The relationship between AMD's unannounced client products "Olympic Ridge," "Medusa1," and "Medusa2" and the AM5/FP10 platforms is starting to take shape. Screenshots from the AMD Technical Information Portal show four combinations listed under desktop and mobile product filters. Meanwhile, a patch submitted by an AMD engineer to Linux kernel developers offers primary-source confirmation of the three codenames along with their processor model ranges. That said, this is only a clue for reading product configurations—it is not a product announcement that fixes core counts, manufacturing process, or release dates.
Four Portal Categories and the Linux Patch's Model Ranges
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The portal screenshot posted by InstLatX64 showed the following product categories. AMD's public search page remains accessible, but note that as of August 27, 2026, the relevant filter items could not be found in the logged-out public search.
| Category on AMD Portal | Codename | Platform |
|---|---|---|
| AMD Ryzen Desktop | Olympic Ridge | AM5 |
| AMD Ryzen Desktop | Medusa1 | AM5 |
| AMD Ryzen Mobile | Medusa1 | FP10 |
| AMD Ryzen Mobile | Medusa2 | FP10 |
This table is search metadata from the AMD portal, not a product announcement document. Still, its value lies in the fact that three fields—product family (desktop/mobile), codename, and platform—appear together on the same screen. The Linux patch supplements this with codenames and processor model ranges, while the official roadmap fills in the timing of the Medusa generation. Where materials created for different purposes overlap, we can draw a more reliable outline than any single leak would allow.
The codenames themselves are corroborated by a separate primary source. A Linux HSMP (Host System Management Port) patch submitted by an AMD engineer on July 29, 2026 lists Family 1Ah client products as follows: Medusa1 covers Models 80h-87h, Olympic Ridge covers 88h-8Fh, and Medusa2 covers E0h-E3h. HSMP is a mailbox-style interface that lets the OS handle processor status retrieval and management functions.
What makes this patch interesting is that instead of using server-oriented HSMP message IDs as-is, it connects to the client-oriented Ryzen Master SMC (RMSMC) message set. In other words, AMD is working to integrate pre-release Family 1Ah client chips into Linux's monitoring and management pathways.
However, the patch is no substitute for product documentation. In v3, dated August 19, 2026, the method for identifying target models changed from hardcoding them in the code to identifying client machines via ACPI's preferred_profile. The series is still under review, and this does not imply adoption into mainline Linux, product release, or feature completion.
Olympic Ridge and Medusa1 Share AM5
In the portal screenshot, both Olympic Ridge and Medusa1 appear as "AMD Ryzen Desktop" products on the AM5 platform. This arrangement suggests the possibility that multiple product lines will be offered on AM5 during the Zen 6 era, but the roles of each have not yet been specified. Whether one will be a CPU and the other an APU, or how they might differ in price tier or integrated GPU presence, cannot be determined from this categorization alone.
There is an official basis for the expectation that AM5 will continue into the next generation. On May 31, 2026, AMD announced it would extend Socket AM5 support through 2029. The timeline for Medusa and AM5 shown in the 2027 official roadmap overlaps with this, and today's listing is consistent with that policy.
That said, "AM5 support" is not a guarantee that a future CPU will necessarily work in every existing motherboard. Actual compatibility depends on each product's electrical requirements, firmware capacity, and the BIOS provided by motherboard manufacturers. Beyond the socket name, buyers will need to check the CPU support lists and compatible BIOS versions published after the product announcement.
What It Means for Medusa1 to Span AM5 and FP10
Another focal point is that Medusa1 appears on both desktop AM5 and mobile FP10. At least in the portal's categorization, the family name "Medusa1" spans two markets and two platforms. Medusa2, meanwhile, appears only under mobile FP10 in the same screenshot—indicating that AMD is managing the Medusa generation not as a single monolithic lineup but as multiple distinct series.
From here, caution is warranted. Even sharing the name "Medusa1," the AM5 and FP10 versions are not necessarily built on the same silicon. Chiplet configuration, integrated GPU, and NPU details remain unannounced, and differences in memory controller or packaging are also unknown. The portal's category names are meant for product search purposes, not blueprints.
Earlier reports had claimed specifications and timing such as 24 cores, 12 cores per CCD, TSMC's 2nm process, 65-170W power range, RDNA 4m graphics, and a CES 2027 debut—but the AMD materials and Linux patch confirmed here do not substantiate any of these claims. The market positioning of Medusa1/Medusa2 relative to each other, as well as any performance gap versus Olympic Ridge, also remain unconfirmed at this stage.
Reading the 2027 Medusa Timeline and the "Over 10x" Figure Correctly
AMD itself had already indicated the generation name "Medusa" and its timing. The client roadmap unveiled at the November 11, 2025 Financial Analyst Day placed Medusa in 2027. Today's codenames can therefore be connected to AMD's already-published roadmap.
The same materials also depicted an "over 10x" improvement in AI compute performance, but the scope of comparison deserves attention. This is a long-term internal projection of AI Compute Performance starting from 2022's Phoenix and progressing through Hawk, Strix/Krackan, and Gorgon before reaching Medusa in 2027—it is not a claim that Medusa's CPU performance, IPC, or standalone NPU performance will be 10 times greater than the immediately preceding generation. The material itself is a forward-looking projection, and the roadmap is subject to change.
What can be firmly stated at this point is only this: AMD is preparing three Family 1Ah product lines on the software side, and has organized them into four combinations across AM5 and FP10 on its portal. The next confirmation will come from AMD's SKU announcements, individual model datasheets, motherboard compatibility lists, and the adoption status of the Linux patches. Rather than filling in rumored specifications, tracking whether these sources converge on the same product picture will get us closer to the real shape of Zen 6 client chips more quickly.