On October 1, 2026, JEDEC announced the publication of JESD264, a standard that defines qualification tests and reliability requirements for silicon photonics. It sets common criteria for testing methods and manufacturing controls for optical devices used in AI data centers and telecommunications networks, and JEDEC describes it as the first cross-industry standard of its kind. As volume production of optical interconnects grows, the standard aims to clarify how reliability is verified, and who is responsible at each stage, among chipmakers, the companies that handle assembly, and system developers.
Rather than defining a new optical transmission method to raise communication speeds, it is an effort to let companies evaluate reliability against a shared baseline when combining components made and assembled by different firms.
Being able to carry large volumes of data over light is one thing; keeping that connection stable over the long term is another. In co-packaged optics (CPO), where optical components sit close to switch or compute chips, even the question of how to replace a failed component becomes part of system design. Separating what JESD264 standardizes, namely the evaluation of components and manufacturing processes, from what still requires product-by-product judgment, such as connection methods and maintenance design, helps clarify what this standardization means.
Optical device reliability and the division of roles among companies
The official title of JESD264 is "Silicon Photonics Qualification and Reliability Requirements." JEDEC says it covers silicon photonics dies and the chipsets that incorporate them. A die is an individual semiconductor chip cut from a wafer. The standard reportedly covers not only qualification testing of individual components but also assembly processes, laser integration, manufacturing process control, and traceability.
Silicon photonics forms circuits on a semiconductor chip to transmit and control light. Optical modulators place data onto light, waveguides carry it, and photodiodes convert received light into electrical signals. In addition to qualification testing for such optical devices, JEDEC says it sets clear requirements for the process of integrating lasers, which serve as the light source.
The standard also addresses the scope of responsibility when work is handed off between companies. It aims to clarify who verifies reliability at each stage among foundries that manufacture the chips, OSATs (outsourced semiconductor assembly and test providers) that handle assembly and testing, and system developers. JEDEC explains that, compared with conventional CMOS technology, silicon photonics has lacked an industry-wide framework for handling reliability evaluation and the allocation of responsibility. This does not mean companies have not been conducting reliability tests until now.
Angelo Miele of Cisco, who co-led the drafting of the standard, said module suppliers and companies operating large-scale data centers took part. More than 20 companies, including design firms and foundries, participated in drafting and ultimately approved the standard. It is an effort to align the premises of reliability evaluation on both the manufacturing side and the user side. However, the figure of more than 20 companies does not mean that many products already conform to JESD264.
How it differs from existing CPO specifications
OIF has already published documents covering CPO connection requirements and system design. Its framework document dated February 3, 2022, lays out technical considerations for placing optical and electrical communication functions near the same package as an ASIC. Its 3.2Tb/s CPO module specification, dated March 29, 2023, defines the details of the module's electrical, optical, and mechanical interfaces.
JESD264 mainly addresses component qualification and reliability evaluation, while OIF's 3.2Tb/s CPO module specification defines electrical, optical, and mechanical connection requirements. OIF's framework document goes further, examining system-design issues such as redundancy and serviceability.
| Document and release date | Main scope | Role when evaluating a product |
|---|---|---|
| JEDEC JESD264, announced October 1, 2026 | Optical dies and chipsets, component qualification, assembly and manufacturing control | Evaluate the reliability of components and manufacturing processes against a baseline shared among suppliers |
| OIF 3.2Tb/s CPO module specification, March 29, 2023 | Electrical, optical, and mechanical interfaces of the module | Confirm the connection requirements for integrating the module into a system |
| OIF CPO framework document, February 3, 2022 | Considerations for interoperability, laser placement, thermal issues, serviceability | Examine how component failures affect equipment downtime and replacement work |
As of October 3, 2026, this table organizes the main items presented in JEDEC's announcement, along with the OIF module specification and the OIF framework document's overview and its sections on light sources and reliability, by scope and purpose. It is not a direct clause-by-clause comparison of JESD264. Because the OIF documents also discuss reliability, the roles partly overlap. Nor does the table indicate formal compatibility or conformance relationships among the standards. OIF module specification, p. 3, OIF framework document, pp. 3, 18, 26
Understanding this difference makes it clearer what to check when adopting a product. Even a module that meets the connection specification still needs a separate reliability evaluation to show it can withstand real operating conditions. And even after a component's reliability is confirmed, the question remains of how the system as a whole copes when a failure occurs.
The point of a common qualification baseline is not for the standard to dictate product design. It is to make it easier to compare and evaluate the test results presented by different companies on a shared footing.
Where to place the laser, and how to replace it when it fails
Compared with conventional optical transceivers that can be plugged in and removed from the front of a device, CPO may be harder to maintain in the field. OIF's framework document states this explicitly, noting that reliability must be considered at the system level, not just the component level. AI and machine learning applications require large total bandwidth and many connections, so the impact of a link failure tends to be greater.
Laser placement is one concrete design decision here. In the external light source configuration OIF describes, a failed laser could be replaced from the front of the device, potentially without shutting down the switch itself. Physically separating the switch ASIC from the light source also offers the benefit of improving the thermal environment of each. Whether to put the light source near compute or switch chips that tend to run hot, or to separate it into a position where it can be replaced if it fails, affects both thermal design and serviceability.
On the other hand, an external light source comes at a cost: the optical path is longer and there are more connection points, which increases insertion loss. Insertion loss is the amount of light lost as it passes through connections and waveguides. OIF explains that the light source's output must be raised to compensate for this loss.
By contrast, in configurations that integrate the laser within the optical engine, there is less optical loss to compensate for, and the laser may be able to run at lower optical power.
In other words, ease of replacement and reduced optical loss cannot necessarily be achieved at the same time. Moreover, simply having an "external light source" does not mean every product can be replaced while in operation; the actual layout and replacement procedure need to be checked. Only by considering not just a common standard for component lifetime but also thermal design and maintenance methods can one judge whether an optical interconnect can run stably in a real system.
Volume production of silicon photonics is already under way
In a June 26, 2024 announcement, Intel said it had shipped more than 8 million photonic integrated circuits (PICs), incorporating more than 32 million on-chip lasers. These PICs are used in pluggable optical transceiver modules for 100, 200, and 400Gbps, deployed in the data center networks of major cloud providers.
However, this production track record should be distinguished from the optical I/O chiplet "OCI" that Intel showed in the same announcement. OCI was a prototype chip operated while co-packaged with a CPU, and Intel stated at the time that it was a prototype. The shipment record of PICs for existing optical transceivers cannot be treated as volume production experience for CPO or optical I/O chiplets that place optical I/O near compute chips.
As this example shows, silicon photonics is not a technology that waited for an industry-wide reliability standard before reaching practical use. Companies have already shipped products and built up reliability evaluation in their own ways.
JESD264 can be seen as a common baseline that makes it easier to share that evaluation experience among different design, manufacturing, assembly, and user companies. For companies newly adopting silicon photonics, it could also serve as a foundation for deciding which test results and manufacturing records to request from suppliers.
The next focus: how it is used in actual products
JEDEC's announcement does not name specific products that will adopt JESD264, when it will be applied to volume production processes, or how much failure rates will improve. Reducing adoption risk through standardization is a goal JEDEC states, not an effect that has already been measured.
While JEDEC's public announcement explains the standard's scope and main items, it does not give individual test conditions. Details such as test temperatures, test durations, sample sizes, and pass/fail thresholds must be confirmed in the relevant clauses of the full standard. For that reason, one cannot conclude that a component qualified under JESD264 will last a given number of years, or that the reliability of the whole device is guaranteed.
When evaluating application to actual products, it is necessary to check not only the optical device itself but also the assembly process and the operating environment assumed in testing. If replacement methods for failures and system-side redundancy are also presented, buyers can connect a component's qualification results to real operating conditions.
How far JESD264 can support the spread of optical interconnects for AI data centers depends on whether companies present evaluation results based on the common standard for each product, and whether that information can be handed off consistently across design, manufacturing, assembly, and operation and maintenance.