Apple released the M6 and M5 Ultra at the same time, but even though both are Apple Silicon, they scale in different directions. The M6, Apple's first 2nm chip, powers the new Mac mini and comes with revised CPU core types along with updated AI circuitry and memory bandwidth. The M5 Ultra, built for the new Mac Studio, links two M5 Max chips—each already a two-die package—together, presenting all four dies to software as a single unified processor.
Pre-orders begin August 25, and standard configurations ship September 22, but the 512GB unified memory configuration of the M5 Ultra won't arrive until late October. That means most of the performance figures discussed here are Apple's own claims; thermals, real-world clock speeds, power draw, and sustained performance haven't yet been verified by third parties. Die photos and yield rates also remain unconfirmed.
Just because the two chips were announced together doesn't mean they should be read as a single performance race. The M6 is a design question about how to speed up a compact Mac SoC that tops out at 32GB, while the M5 Ultra is a design question about how to unify multiple dies and massive memory capacity—up to 512GB—for workstation use.
M6's three CPU core types and single-SoC updates
The M6's 12-core CPU consists of two supercores, four performance cores, and six efficiency cores. Apple renamed what it had called the "fastest performance core" design in the M5 to "supercore" in March 2026, and in the M6 it paired two supercores from that same lineage with a separate set of performance and efficiency cores.
| Item | M6 | M5 | M4 |
|---|---|---|---|
| Manufacturing process (as disclosed by Apple) | 2nm | 3rd-generation 3nm | 2nd-generation 3nm |
| CPU | 12 cores: 2 super, 4 performance, 6 efficiency | Up to 10 cores: up to 4 performance, 6 efficiency | Up to 10 cores: 4 performance, 6 efficiency |
| GPU | 12 cores, each with a Neural Accelerator | 10 cores, each with a Neural Accelerator | 10 cores |
| Neural Engine | Two 16-core units, 32 cores total | 16 cores | 16 cores |
| Max unified memory | 32GB | 32GB | 32GB |
| Memory bandwidth | 153GB/s at 16GB, 170GB/s at 24GB/32GB | 153GB/s | 120GB/s |
What the table shows is that the M6 doesn't deliver the same speed gain across every configuration. The top bandwidth figure of 170GB/s is 11.1% higher than the M5's 153GB/s, roughly matching Apple's claim of "up to 10% faster." But the 16GB configuration stays at 153GB/s—unchanged from the M5. Since the standard Mac mini memory configuration is 16GB, only buyers who select 24GB or 32GB actually get the 170GB/s bandwidth.
The CPU comparisons also require separating different baselines. Apple claims the M6's multithreaded performance is up to 1.2x that of the M5 and up to 2.4x that of the M1, while separately claiming the M6 Mac mini's CPU performance is up to 40% faster than the immediately preceding M4 Mac mini. The former figures come from industry-standard benchmarks run on an M6 Mac mini prototype, a 14-inch MacBook Pro with M5, and an M1 Mac mini—none of which share identical chassis or memory conditions. The latter is a direct comparison against the M4 Mac mini specifically. You can't simply chain the 1.2x-over-M5 figure and the 40%-over-M4 figure together as if they represent one continuous generational gap.
On the GPU side, the Neural Accelerator built into each GPU core and the two 16-core Neural Engine units together handle the M6's AI workloads. Apple claims roughly 30% higher peak GPU AI compute compared to the M5, and up to 2x higher peak Neural Engine compute—but peak compute comparisons don't translate directly into real-world application processing times. Compared to the M4 Mac mini, Apple also published figures showing up to 4.8x faster time-to-first-token in LM Studio, up to 1.5x faster Excel calculations, and up to 2x faster performance in Cyberpunk 2077 with ray tracing enabled. However, the LM Studio measurement was based on feeding 8,000 tokens into a 14-billion-parameter 4-bit model—it's not a measure of sustained token generation speed. These three figures come from three different applications running three different kinds of workloads.
The "2nm" label and the boundary with TSMC's N2
What Apple has disclosed about the M6's manufacturing is limited to the phrase "2nm process." It hasn't named the foundry or specified a derivative process node like N2 or N2P. Transistor count and die area also remain undisclosed, as do clock speeds and TDP. There simply isn't enough information to attribute the M6's improvements to a specific manufacturing node.
TSMC has said it began mass production of N2 in the fourth quarter of 2025, describing it as the company's first generation to use nanosheet transistors. The targets TSMC has stated relative to N3E are: 10-15% faster performance at the same power, 25-30% lower power at the same speed, and over 15% higher chip density. But these are TSMC's general targets for N2—Apple has not stated that the M6 uses TSMC's N2 process, and these figures cannot be used as measured improvements for the M6 itself.
Moreover, the M6 isn't a chip where only the manufacturing process changed. The CPU grew from 10 to 12 cores and gained new core types. The GPU core count, Neural Engine count, GPU-embedded Neural Accelerators, and memory bandwidth configuration all changed as well. Isolating the 2nm process's specific contribution to the M6's performance gains will require post-launch data measured under identical conditions.
The M5 Ultra's four-die design and how it compares across Ultra generations
The M5 Ultra connects two M5 Max chips via UltraFusion, and since the M5 Max itself is already a two-die, third-generation 3nm package, the M5 Ultra is effectively built from four third-generation 3nm dies. Apple says the four dies are presented to software as a single unified processor, meaning applications don't need to treat them as separate CPUs. However, Apple hasn't disclosed the physical arrangement of the four dies, the link configuration, or the interconnect medium.
| Item | M5 Ultra | M3 Ultra | M2 Ultra | M1 Ultra |
|---|---|---|---|---|
| Number of dies | 4 | 2 | 2 | 2 |
| Manufacturing process (as disclosed by Apple) | 3rd-generation 3nm | 3nm | 2nd-generation 5nm | 5nm |
| Max CPU | 36 cores: 12 super, 24 performance | 32 cores: 24 performance, 8 efficiency | 24 cores: 16 performance, 8 efficiency | 20 cores: 16 performance, 4 efficiency |
| Max GPU | 80 cores | 80 cores | 76 cores | 64 cores |
| Neural Engine | 32 cores | 32 cores | 32 cores | 32 cores |
| Max unified memory | 512GB | 512GB | 192GB | 128GB |
| Max memory bandwidth | 1.2TB/s | 819GB/s | 800GB/s | 800GB/s |
| UltraFusion inter-die bandwidth (as claimed) | Over 4.4TB/s | Over 2.5TB/s | Over 2.5TB/s | Over 2.5TB/s |
The M5 Ultra increases CPU core count from 32 to 36 compared to the M3 Ultra, but the maximum GPU core count stays flat at 80. The Neural Engine has also remained at 32 cores across every Ultra generation. That means AI performance gains can't be read as a function of increased Neural Engine core count—you also need to account for GPU-embedded Neural Accelerators, GPU generation changes, and memory bandwidth shifts.
Memory scaling also points to different use cases. Maximum capacity stays at 512GB, matching the M3 Ultra, but maximum bandwidth reaches 1.2TB/s—a 50% increase, according to Apple, over the "over 800GB/s" figure stated when the M3 Ultra chip was announced. For local LLM workloads, capacity determines how large a model you can fit in memory, while bandwidth determines how fast weights can be read when generating each token. Rather than pushing toward even larger models, the M5 Ultra's emphasis is on speeding up inference for large models that already fit in memory.
The next-generation UltraFusion interconnect raises inter-die bandwidth to over 4.4TB/s, with connection density described as more than 6x the previous generation. The M3 Ultra's stated figure was over 2.5TB/s—but since both figures are described as lower bounds rather than exact values, the actual rate of increase can't be precisely calculated. Apple hasn't disclosed the directionality or total sum behind the 4.4TB/s figure, nor has it published the exact baseline behind the "over 6x" connection density claim.
This 4.4TB/s figure describes UltraFusion, the interconnect between dies. The 1.2TB/s figure describes bandwidth to unified memory—these are not two different expressions of the same number. You can't add them together to get 5.6TB/s. The M3 Ultra used over 10,000 signal traces to connect its two M3 Max dies, but Apple hasn't disclosed the number of signal traces used in the M5 Ultra.
Increasing the physical die count to four doesn't mean application performance scales linearly to 4x. Unless a workload can effectively parallelize across the CPU, GPU, and memory bandwidth simultaneously, it won't be able to fully utilize the added resources. Apple also claims up to 3x faster AI inference when clustering four Mac Studio units via Thunderbolt 5 and RDMA compared to a single unit—but that's a measurement at a different layer, across separate computers, not a figure that reflects the internal efficiency of the M5 Ultra's four-die design. A clustered shared memory pool also doesn't carry the same latency characteristics as a single machine's unified memory.
Don't conflate the "4.5x" and "4.3x" AI figures
The M5 Ultra's GPU includes a Neural Accelerator in each core, along with second-generation Dynamic Caching, hardware mesh shading, and third-generation ray tracing. The M3 Ultra also has Dynamic Caching, hardware mesh shading, and hardware ray tracing—but it lacks GPU-embedded Neural Accelerators. Having the same GPU core count doesn't mean the underlying processing is equivalent.
Apple's chip announcement listed peak GPU AI compute as up to 4.5x that of the M3 Ultra, with standard graphics performance up to 40% faster. Meanwhile, the separate Mac Studio announcement listed peak AI performance as up to 4.3x and graphics performance as up to 1.8x. Apple hasn't explained the discrepancy between what's being measured in each case, so these aren't the same performance metrics. Text-to-image generation is listed as up to 4.3x faster, and LM Studio prompt processing as up to 4x faster. Figures like up to 3.3x faster training in Nuke CopyCat and up to 1.7x faster Redshift rendering are each specific to their respective applications.
For video, the M5 Ultra's media engine supports H.264 and HEVC, AV1 decoding, and four ProRes encode/decode units. Apple says it can play back up to 33 streams of 8K ProRes 422 video at 30fps, up 37.5% from the M3 Ultra's maximum of 24 streams. This figure is also a comparison under a specific condition—playback stream count—and shouldn't be treated as a general GPU performance multiplier.
A 32GB Mac mini and a 512GB Mac Studio
The M6-equipped Mac mini starts at ¥149,800 (tax included), with 16GB of standard memory and a 32GB maximum. The M5 Ultra-equipped Mac Studio starts at ¥949,800 (tax included), with configurations ranging from a 96GB standard to a 512GB maximum. The M6 hasn't increased maximum memory capacity compared to the M5 or M4, so for local large-model workloads, the product-line gap remains—between the M5 Pro's 64GB maximum and the M5 Ultra's 512GB maximum.
The standard retail configurations of the M5 Max and M5 Ultra also aren't a simple 2x relationship. The M5 Max comes with an 18-core CPU and 32-core GPU, paired with 36GB of memory at 460GB/s. The M5 Ultra comes with a 30-core CPU and 64-core GPU, paired with 96GB at 1.2TB/s. At maximum configuration, the M5 Max's 18-core CPU, 40-core GPU, and 16-core Neural Engine become 36 cores, 80 cores, and 32 cores respectively in the M5 Ultra—but applying that same ratio to the standard configurations would give a misleading picture of the actual options available.
What's worth watching after launch is how the M6's bandwidth gap between the 16GB and 24GB/32GB configurations plays out in real applications, and how far the M5 Ultra's four-die design actually helps with rendering, local LLM inference, and training workloads. Every figure Apple has published is qualified with "up to," and the chip announcements didn't disclose the names of the industry-standard benchmarks used or the full set of sub-tests behind them. Until independent testing arrives, it's most reasonable to think of the M6 as a chip optimized for efficiency within a 32GB ceiling, and the M5 Ultra as a chip built for workloads that can actually exploit large memory capacity and parallelism—rather than generalizing performance gaps from labels like "2nm" or "four dies" alone.