TL;DR

  • What happened: Reuters reported on July 7 that DeepSeek has been developing its own AI inference chip for about a year. Zhipu AI is also exploring an ASIC
  • Why it matters: Alibaba and Baidu have already reached the stage of mass production and IPO preparation, revealing a development gap with DeepSeek and Zhipu, which remain in early conceptual stages
  • What to watch next: Performance targets and launch timing remain undecided. The focus will be on whether the next development milestone, such as tape-out, materializes

For Chinese AI companies, competing on model performance is only half the battle—the other half is securing the semiconductors needed to keep those models running. After a supply-chain tug-of-war involving the embargo on NVIDIA GPUs and the shift toward Huawei Ascend, a new option has now emerged: building chips in-house. According to a Reuters report from July 7, 2026, DeepSeek has been quietly developing its own AI inference chip for about a year. Around the same time, it emerged that Zhipu AI (智譜) had also begun exploring a custom ASIC in response to the rapid growth of its flagship model, GLM-5.2. Yet even as both companies pursue the same goal of moving away from NVIDIA, their progress lags significantly behind domestic front-runners.

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DeepSeek's Quiet Push to Develop Its Own Inference Chip

According to a Reuters report published on July 7, 2026, citing three people familiar with the matter, DeepSeek has been exploring the development of its own AI inference chip for about a year, and the effort remains at an early stage. The target is not a new chip for training models, but a dedicated inference chip designed to keep completed models running. TrendForce reports that DeepSeek has held discussions with chip design firms, foundries, and memory makers, and has been quietly recruiting chip design engineers. The goal is to reduce dependence on NVIDIA and Huawei hardware. This account has been separately reported by multiple outlets, including SiliconANGLE and Yahoo Finance, all citing the original Reuters report.

Moving in parallel is Zhipu AI (智譜). According to a report by The Information, relayed by Investing.com, daily token usage of its flagship model GLM-5.2 surged up to 27 times within a week of its release. In response to this rapid growth, Zhipu has begun exploring the development of a custom ASIC (an application-specific integrated circuit optimized for a particular use) for its own models, and has entered early discussions with several domestic chip design firms. However, no partner company has been selected yet.

The Weight of Inference Costs Is Driving In-House Chip Development

Chips used for training models and those used for running completed models to handle daily user queries have fundamentally different cost structures. Training is a one-time, large-scale investment, whereas inference is an ongoing cost that accumulates with every increase in user requests. When usage surges 27-fold in a week, as with GLM-5.2, every additional rental of NVIDIA GPUs in the cloud comes with the high per-unit cost of general-purpose chips. Switching to a custom-designed inference-specific chip could reduce the per-query processing cost by eliminating the extra circuitry for training found in general-purpose GPUs, focusing purely on inference. Zhipu's move toward an in-house chip, timed with this surge in usage, appears aimed at easing the burden of this recurring cost.

DeepSeek's history of supply chain disruptions in semiconductor procurement also underlies its in-house chip ambitions. Its reasoning model R1 was trained on the China-specific NVIDIA H800, but after the U.S. banned exports of that chip, the company deepened its collaboration with Huawei Ascend, according to TrendForce. The H800 was originally a China-specific GPU with reduced performance to comply with U.S. export restrictions, yet even its procurement was eventually cut off by the embargo. In April 2026, DeepSeek released the V4 model optimized for Huawei Ascend, reportedly driving a surge in demand for Ascend 950.

That said, U.S. export restrictions on AI semiconductors to China have flip-flopped roughly every few months since late 2025—from a ban on the H20, to conditional approval, to Chinese customs rejecting H200 imports. As of this writing, it is not possible to definitively state the current status. During this period, Chinese AI companies, including DeepSeek, have had to repeatedly revise their core procurement strategies every few months. NVIDIA CEO Jensen Huang has stated that the company's market share in China has fallen from roughly 95% in 2022 to about 50% in 2025.

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The Development Phase Gap With Alibaba and Baidu

Alibaba's T-Head and Baidu's Kunlunxin have already entered the mass production stage for their in-house AI chips ahead of DeepSeek and Zhipu, and TrendForce reported in May 2026 that Kunlunxin is preparing for listings on both the Hong Kong and Shanghai STAR Market exchanges. Its valuation is estimated at around HK$100 billion. Meanwhile, DeepSeek and Zhipu remain at the stage of early discussions with chip design firms. Even under the same headline of “building in-house chips,” the reality is a gap of one to two years between companies in the mass production phase and those still in the conceptual phase.

The beneficiaries of this gap are domestic Chinese chip design and foundry companies. Zhipu appears to be in contact with several domestic design firms, likely including companies such as Cambricon and Biren, which have previously been floated as potential NVIDIA alternatives. The precedents set by Alibaba and Baidu demonstrate that such domestic suppliers can mature to the point of practical deployment. Kunlunxin's progress toward an IPO also shows that domestic chip design companies have reached a stage where they can be valued by capital markets.

Conversely, NVIDIA and Huawei find themselves in a difficult position. Analyst Richard Windsor of Radio Free Mobile has stated, "NVIDIA is already at zero in the Chinese market, and that is likely to remain the case. Unless DeepSeek gains access to cutting-edge manufacturing technology, there is little prospect of it selling its own silicon outside China." ByteDance's explicit denial on June 29, 2026, of rumors that it had adopted Baidu's Kunlun Core chip also reflects a broader trend of Chinese AI companies each asserting their own independent paths. Following the report, NVIDIA's stock fell about 1.6% in pre-market trading.

The Scale of the Lag, Seen Against Jalapeño's 9 Months

On June 24, 2026, OpenAI unveiled Jalapeño, an inference-specialized chip co-developed with Broadcom. The time from design to tape-out (the final stage where chip design data is finalized and handed off for manufacturing) took just nine months, and the company aims for initial deployment within 2026. DeepSeek has been exploring its own chip development for about a year—already longer, in terms of elapsed months, than Jalapeño's entire design period. Yet the stage it has reached remains an early conceptual phase, still far from tape-out.

As for Zhipu, The Information notes that realizing its own ASIC could take more than two years. Compared to Jalapeño's nine-month design period, that is more than double the time by simple calculation. As one contributing factor to this gap, wccftech notes in an analysis piece that DeepSeek's new chip may be limited to SMIC's mature process nodes—though this is the outlet's own assessment, and the original Reuters report itself does not specify a foundry name or process node. Still, multiple reports point to a common picture: completing the journey from design to mass production in an environment with restricted access to cutting-edge lithography equipment poses a higher hurdle than it did for OpenAI, which was able to partner with an established and capable design partner in Broadcom. This time gap is unlikely to close simply with the passage of time, as long as restrictions on access to manufacturing equipment persist.

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Undecided Performance Targets, and Touchpoints With Japan's Semiconductor Supply Chain

Neither DeepSeek nor Zhipu has disclosed specific performance targets, launch timing, investment amounts, or the choice of foundry and process node for their in-house chips under development. They remain far from being able to declare a 2026 launch as Jalapeño has done, and a concrete numerical comparison with Alibaba and Baidu will only become possible once the next development milestones—such as the finalization of a design partner or tape-out—come into view.

In a July 7 report, Reuters stated that in June 2026, DeepSeek was planning to raise about $7 billion (roughly ¥1.13 trillion, at ¥162 to the dollar) from state-backed funds, Tencent, CATL, and others. Subsequently, multiple reports, including Yahoo Finance, revised the fundraising figure upward to $7.4 billion (roughly ¥1.2 trillion). Reports consistently cite a valuation of $52 billion to $59 billion (roughly ¥8.4 trillion to ¥9.6 trillion). Now that it has secured ample funding, the question is whether DeepSeek can use it as the resource to close its development gap.

For Japan, the connection lies beyond this technical constraint, in a concrete form. As wccftech points out, if DeepSeek's new chip is indeed limited to SMIC's mature process nodes, the main battleground for mass production shifts to mature-node foundries—not the domain of cutting-edge lithography lines.

As SMIC expands its mature-process production capacity, Japanese companies such as Tokyo Electron, SCREEN Holdings, and Shin-Etsu Chemical could emerge as candidates for supplying etching equipment, cleaning equipment, and photoresists used on those lines. At the same time, if U.S. export restrictions on China tighten again, the risk grows that this entire supply chain could be swept into the scope of regulation. Whether the gap with Alibaba and Baidu narrows will be tested by when DeepSeek and Zhipu reach their first tape-out.

画像・図解の提案 (with Generative AI Prompts)

アイキャッチ画像（3案）

  1. 分岐する2本の半導体製造ラインが、片方は完成品のチップへ、もう片方はまだ設計図の段階で止まっている様子を対比的に描く

    • Prompt: A split composition showing two silicon wafer production paths diverging, one path leading to a finished glowing microchip, the other path stopping at a glowing blueprint schematic still in early design stage, editorial technology illustration, dark background, blue-cyan accent lighting, clean and refined, no text, no logos
    • File: deepseek-chip-development-gap-eyecatch1.png

  2. 巨大なGPUのシルエットから、小さな専用チップの設計図が切り離されていくイメージ

    • Prompt: A large silhouette of a generic GPU chip with a smaller specialized inference chip schematic breaking away from it, symbolizing independence from general-purpose hardware, editorial technology illustration, dark background, blue-cyan accent lighting, clean and refined, no text, no logos
    • File: deepseek-inference-chip-independence-eyecatch2.png

  3. 中国地図をモチーフに、複数の半導体チップアイコンが異なる高さの階段状の台座に置かれている構図（開発フェーズの差を象徴）

    • Prompt: An abstract map silhouette of China with several glowing microchip icons placed on staircase-like pedestals of different heights, symbolizing different stages of chip development maturity, editorial technology illustration, dark background, blue-cyan accent lighting, clean and refined, no text, no logos
    • File: china-chip-development-stages-eyecatch3.png

挿絵・解説グラフィック（2案）

  1. 訓練チップと推論チップのコスト構造の違いを示す概念図（一度きりの投資 vs 継続的な利用コスト）

    • Prompt: A conceptual diagram illustrating the cost structure difference between AI training chips (one-time large investment, shown as a single tall bar) and inference chips (recurring ongoing cost, shown as a repeating stepped pattern), editorial technology illustration, dark background, blue-cyan accent lighting, clean and refined, no text, no logos
    • File: training-vs-inference-chip-cost-illustration1.png

  2. OpenAIのJalapeñoの9カ月の開発タイムラインと、中国勢の未確定な長い開発期間を並べたタイムライン比較図

    • Prompt: A horizontal timeline comparison graphic showing a short glowing 9-month development bar for one path and a longer, dimmer, uncertain multi-year bar for another path, symbolizing a chip development speed gap, editorial technology illustration, dark background, blue-cyan accent lighting, clean and refined, no text, no logos
    • File: chip-development-speed-timeline-illustration2.png

推奨スラッグ

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