- What happened: In October 2026, IEC 63068-5, an international standard for examining crystal defects in silicon carbide (SiC) wafers using X-ray topography, was published. Japan proposed the standard and led its international standardization.
- Why it matters: For crystal defects that are hard to tell apart with optical inspection or photoluminescence (PL), guidelines for detection and classification using X-ray topography are now set out in an international standard. It is expected to complement existing inspection methods and help improve the accuracy of SiC wafer quality evaluation.
- What to watch next: IEC 63068-6, which would integrate optical inspection, PL, and X-ray topography, has had its proposal approved in a vote by national committees, but the formal launch of the standard-development project and the publication of the standard are still to come. How widely standard-compliant evaluation methods are adopted on manufacturing floors will also be worth watching.
On October 27, 2026, the National Institute of Advanced Industrial Science and Technology (AIST) announced that IEC 63068-5, an international test-method standard for examining crystal defects in silicon carbide (SiC) wafers by X-ray topography, was published in October of the same year. AIST proposed the standard from Japan through industry-academia-government cooperation, working with organizations including the Japan Electronics and Information Technology Industries Association (JEITA). Demand for SiC power semiconductors is growing in electric vehicles (EVs) and renewable energy equipment, and technologies that ensure wafer quality and device reliability are becoming increasingly important.
However, test methods for evaluating SiC wafers by X-ray topography already exist in SEMI industry standards. How does the new IEC 63068-5 differ from those existing methods, and what role does it play within the IEC 63068 series of international standards? Looking at the content of the standard and the history of its development reveals an aim: to combine multiple inspection methods to classify crystal defects more accurately.
X-ray topography complements optical inspection and PL for hard-to-distinguish defects
The foreword of IEC 63068-5 describes the challenges facing existing inspection methods. Optical inspection and photoluminescence (PL), both used to evaluate SiC wafers, can have their results affected by factors such as the surface shape of the wafer and the in-plane distribution of impurity concentration. As a result, even when an inspection tool detects a defect, additional visual confirmation may be needed to identify its type accurately.
Four types are cited as particularly difficult to classify: micropipes, threading screw dislocations (TSDs), threading edge dislocations (TEDs), and particle inclusions. Although these are different types of defects, they can show similar features under optical inspection and PL. Accurately determining which defect a detected anomaly corresponds to requires an inspection method that provides different physical information. IEC 63068-5 is a standard for using X-ray topography to supplement that judgment.
The three inspection methods capture defects through different mechanisms. According to AIST, optical inspection uses tools such as microscopes to examine the surface shape and irregularities of the wafer, while PL analyzes the light emitted when the wafer is illuminated to investigate defects inside the crystal. X-ray topography, by contrast, uses X-ray diffraction by the crystal to visualize internal strain and crystal defects as images. Because it provides information different from surface shape or emission characteristics, it is useful for evaluating defects that are hard to detect or classify with optical inspection and PL alone.
Importantly, X-ray topography does not replace the two conventional methods; the three complement one another's results. Combining surface anomalies confirmed by optical inspection, or changes in emission characteristics detected by PL, with internal crystal information obtained from X-ray diffraction may allow defect types to be identified more accurately. What the foreword of IEC 63068-5 emphasizes in particular is the classification of defects with similar features. AIST, meanwhile, explains that X-ray topography is also effective for crystal defects that are difficult to detect at all with optical inspection and PL alone.
AIST refers to defects that directly cause semiconductor device malfunction or failure, making a product unusable, as "device-killer defects." In SiC power semiconductors, such defects can affect manufacturing yield and long-term reliability. However, not all defects have the same degree of impact, so accurately identifying defect type is important. For that reason, a common evaluation method that allows information from different inspection methods to be cross-checked has been needed.
IEC 63068-5 specifies detection and classification guidance and image examples of seven defect types
IEC 63068-5 targets defect evaluation in SiC homoepitaxial wafers. A homoepitaxial wafer is one in which a thin film with the same crystal structure is grown on a single-crystal substrate. The standard's scope defines terms and usage guidance for detecting defects with an X-ray topography inspection system, and also provides X-ray topography images as examples to help with defect detection and classification. AIST describes the standard's target as defects in the epitaxial layer.
Annex A (informative) of the standard includes example X-ray topography images for the following seven types of defects:
- Micropipes
- Threading screw dislocations (TSDs)
- Threading edge dislocations (TEDs)
- Basal plane dislocations (BPDs)
- Scratch marks
- Stacking faults
- Polytype inclusions
However, the number seven reflects the number of image examples in Annex A and does not limit the defects the standard covers to seven types. Figure 1 of the main text also includes a schematic of a laboratory X-ray topography (XRT) imaging system. Within the scope of the preview published by the IEC, however, specific parameter values for measurement conditions cannot be confirmed. Evaluating the standard's detailed measurement conditions and criteria requires checking the full text.
IEC 63068-5 was developed by IEC TC 47 (Semiconductor devices). According to AIST, the detailed deliberations took place in TC 47/WG 5 (Wafer-level reliability of semiconductor devices). The standard is Part 5 of the series whose common title corresponds to "non-destructive recognition criteria of defects in silicon carbide homoepitaxial wafer for power devices." Its normative references include IEC 63068-1, which defines defect classification.
The new standard builds on research, development, and standardization carried out in Japan. AIST has pursued research on defect evaluation technology using X-ray topography together with standardization of the test method. Based on those results, it first established the domestic industry standard JEITA EDR-4712/500 and proposed its content to the IEC as a draft international standard. After international deliberations in TC 47/WG 5, it was published in October 2026 as IEC 63068-5.
How it differs from the existing SEMI M91 and M93
IEC 63068-5 is not the first time an X-ray topography method for evaluating SiC crystal defects has been standardized. SEMI, the international industry association for semiconductor manufacturing equipment and materials, has also established test methods for SiC as standards. The best-known are SEMI M91 and SEMI M93. These differ from IEC 63068-5 in target materials, the defects evaluated, and how measurement results are handled.
SEMI M91 is a test method for measuring the density of threading screw dislocations (TSDs) in 4H-SiC, one of the crystal structures of SiC, by X-ray topography. According to the standard's abstract, it covers circular test specimens and commercially available 4H-SiC wafers and applies to TSD densities up to 5,000 cm⁻². The measured density can also be used for incoming material inspection. The version in question is the 2022 edition.
SEMI M93, meanwhile, is a test method that quantifies the density of basal plane dislocations (BPDs) in 4H-SiC substrates using X-ray topography (XRT) or X-ray diffraction imaging (XRDI). It covers circular test specimens and commercially available 4H-SiC substrates and includes a procedure for calibrating measurements using etch-pit evaluation results. It is also a standard usable for incoming material inspection; the 2023 edition was published and a technical revision was made in 2024.
Comparing the three standards in terms of target material, the defects evaluated, and the results obtained gives the following:
| Standard | Target material | Main target defects | Evaluation content / output |
|---|---|---|---|
| SEMI M91 | 4H-SiC test specimens and commercial wafers | TSD | Measures TSD density. Applicable up to 5,000 cm⁻²; usable for incoming inspection |
| SEMI M93 | 4H-SiC test specimens and commercial substrates | BPD | Quantifies BPD density. Includes calibration procedure using etch pits; usable for incoming inspection |
| IEC 63068-5 | Epitaxial layer of SiC homoepitaxial wafers | Defects in the epitaxial layer. Annex A gives image examples of seven types | Specifies definitions, usage guidance, and image examples for defect detection and classification |
SEMI M91 and M93 focus on quantitatively measuring the density of specific dislocations. IEC 63068-5, by contrast, sets out guidance for detecting and classifying defects present in epitaxial wafers and is distinctive in showing image examples for multiple defect types. Note that this comparison is based on the abstracts on SEMI's product pages and the IEC's public preview, and does not compare the relative merits of measurement accuracy or detailed test conditions.
The difference is easy to see using TSDs as an example. SEMI M91 measures how many TSDs exist per unit area. In IEC 63068-5, TSDs are treated as one of the defects that are hard to distinguish from TEDs, micropipes, particle inclusions, and the like. Annex A also shows image examples of TSDs and TEDs, which serve as a reference when identifying defect types from X-ray topography images. Even though both deal with TSDs, one is mainly about quantifying density and the other about detection and classification.
Crystal defects in SiC are also not unrelated between the substrate stage and the epitaxial layer stage. According to the abstract of SEMI M93, most BPDs in the substrate convert to TEDs during epitaxial growth, but some are carried into the epitaxial layer or form stacking faults. Any of these defects can lead to device failure. The abstract of SEMI M91 likewise explains that many TSDs in the substrate are carried into the epitaxial layer and can form pits on the surface.
In other words, the SEMI standards, which evaluate the density of dislocations in the substrate, and IEC 63068-5, which detects and classifies defects in wafers after epitaxial growth, target different stages of the manufacturing process. BPDs are the quantification target of SEMI M93 and also appear as an image example in Annex A of IEC 63068-5. These standards are better seen not as competing but as supporting quality evaluation of SiC wafers, from substrate through epitaxial layer, for different purposes.
About 25 years of research becomes an international standard; next comes Part 6, integrating the three methods
According to AIST, the research leading to this standardization began around 2001. At that time, work began to investigate the relationship with wafer quality, focusing on the effect of crystal defects in SiC epitaxial wafers on semiconductor device manufacturing yield and reliability. However, definitions, classification methods, and inspection methods for crystal defects differed among research institutions and companies, making it difficult to compare measurement results against a common standard. To resolve these issues, standardization of defect classification and inspection methods has been pursued.
In a project of the New Energy and Industrial Technology Development Organization (NEDO) that began in fiscal 2010, correlation evaluations comparing the results of optical inspection, PL, and X-ray topography were carried out alongside the organization of defect classification. From fiscal 2015 onward, international standardization efforts got into full swing through projects commissioned by the Ministry of Economy, Trade and Industry. The commissioned projects have continued over four periods: fiscal 2015–2017, 2018–2020, 2021–2023, and 2024–2026.
The IEC 63068 series has been built on these results. In 2019, Parts 1 and 2, covering defect classification and optical inspection, were published; Part 3, covering PL, followed in 2020, and Part 4, covering an evaluation method combining optical inspection and PL, in 2022. With the publication of Part 5, covering X-ray topography, in October 2026, five standards have been completed over about seven years.
| Standard | Main content | Publication date |
|---|---|---|
| IEC 63068-1 | Defect classification | 2019 |
| IEC 63068-2 | Optical inspection | 2019 |
| IEC 63068-3 | Photoluminescence (PL) | 2020 |
| IEC 63068-4 | Evaluation method combining optical inspection and PL | July 27, 2022 |
| IEC 63068-5 | X-ray topography | October 2026 |
The publication years for Parts 1 to 3 are based on AIST's announcement. The date of July 27, 2022 for Part 4 comes from the IEC Webstore listing, and for Part 5, AIST announced October 2026. The seller VDE Verlag gives the publication date of Part 5 as October 6, 2026. These are the dates of publication at the IEC and are separate from the dates on which individual countries adopt them as national standards.
With the publication of Part 5, individual standards for each of the three inspection methods, optical inspection, PL, and X-ray topography, are now in place in the IEC 63068 series. Part 2 covers optical inspection, Part 3 covers PL, and Part 5 covers X-ray topography, so defect evaluations based on different measurement principles can now be referenced within a common standards framework. However, an international standard that integrates the three inspection methods and allows the results to be judged comprehensively has not yet been completed.
The next standard expected to fill that role is IEC 63068-6. According to AIST, a defect-discrimination method combining optical inspection, PL, and X-ray topography has already been established as the domestic industry standard JEITA EDR-4712/600. To develop that result into an international standard, a new project for IEC 63068-6 was proposed in July 2026. The proposal was approved in a vote by national committees held from July 24 to October 16, but the formal launch of the standard-development project is planned for the future, and IEC 63068-6 has not been published.
AIST expects that if evaluation methods compliant with these international standards are introduced at SiC wafer makers and semiconductor device makers, they will lead to reduced quality variation, improved manufacturing yield, and cost reductions. It also says they may contribute to improved reliability in the power infrastructure sector, where ultra-high-voltage SiC power devices with breakdown voltages above 10 kV are expected to be used. AIST also suggests that if evaluation technologies accumulated by Japanese companies are adopted as common international standards, it will become easier to demonstrate the quality and reliability of Japanese SiC products to overseas customers. However, no quantitative data has been published on specific effects, such as the size of yield improvements or the amount of cost reduction.
Going forward, AIST plans to advance the development of IEC 63068-6 in cooperation with experts in various countries, and to promote adoption through industry-academia-government joint research and technical support that use standard-compliant test methods, as well as through academic conferences and seminars. The publication of IEC 63068-5 is significant in that it establishes an internationally common test method for evaluating defects in SiC wafers by X-ray topography. At the same time, quality improvement and higher yields are not achieved at the moment a standard is published; they can be expected only once the evaluation methods are introduced on manufacturing floors and become established. What matters next is the formal development and publication of IEC 63068-6, and how far evaluation combining the three inspection methods spreads in actual SiC manufacturing processes.