Intel will revive simultaneous multithreading (SMT) in its future server CPU, "Coral Rapids." CEO Lip-Bu Tan explained the roadmap following Clearwater Forest and Diamond Rapids during the Q2 2026 earnings call on July 23, 2026, stating clearly that Coral Rapids will carry multithreading.
However, this is not the first time this plan has been disclosed. Intel had already announced the same plan in its Q4 2025 earnings materials. What became clearer through this latest statement is that Intel continues to treat SMT not as a discarded legacy feature, but as a design element for catching up with AMD in the server market.
A Reconfirmation of SMT's Return
During the Q&A session of the earnings call, Tan stated that Intel has Clearwater Forest, Diamond Rapids, and "Coral Rapids with SMT." He explained that improving competitiveness requires enhancing both single-thread and multi-thread performance, and that the latter would return with Coral Rapids.
The origin of this policy dates back at least a year. In July 2025, Intel explained that moving away from SMT had put its data center business at a competitive disadvantage, and that reviving it would help close the performance gap. Furthermore, in its Q4 2025 materials, Intel noted it was simplifying the server roadmap, concentrating resources on the 16-channel version of Diamond Rapids, and pulling forward the introduction of Coral Rapids as much as possible.
In other words, this latest development is not the first disclosure of SMT's revival, but rather top management reiterating it as a measure to restore competitiveness. The reason Intel keeps bringing up this feature during earnings calls is that the number of logical threads is one factor determining capacity for cloud computing, virtualization, and highly parallel server workloads.
The 2028 Date Isn't Yet Tied to Coral
Intel's public materials do not indicate a release year for Coral Rapids. What was explicitly stated as 2028 in the Q2 2026 earnings materials is the large-scale mass production of the next-generation manufacturing process, "Intel 14A." The company stated it would move 14A to risk production in the second half of 2027 and invest fully in ramping up mass production in 2028, but it did not state that Coral Rapids would use 14A or that it would launch in the same year.
The same boundary exists for the product name. The only codename Intel has confirmed is Coral Rapids—no "Xeon 8" branding or core count has been announced. Power consumption, memory configuration, and the performance improvement rate from SMT also remain unannounced. One cannot substitute the mass-production year of a manufacturing process for the release year of a CPU that hasn't been confirmed to use that process.
The view that the immediately preceding generation, Diamond Rapids, does not feature SMT also cannot be said to be officially confirmed. When Tom's Hardware asked Intel executives about this point at Computex in June 2026, the company avoided answering, saying it would explain details about Diamond Rapids at a later date. Given that Intel has stated it is "reintroducing" SMT with Coral Rapids, there is a high likelihood that a gap exists somewhere in the roadmap. Still, exactly which product that gap begins with and how many generations it spans has not been confirmed by public information.
128 Cores/256 Threads and 288 Cores/288 Threads
Looking at the current Xeon lineup, it isn't accurate to say that Intel server CPUs have uniformly abandoned SMT. The flagship P-core-based Xeon 6, the "6980P," has 128 cores and 256 threads with Hyper-Threading enabled. Meanwhile, the E-core-based Xeon 6+ "6990E+," introduced in Q2 2026, has 288 cores and 288 threads.
| Product | Core Type | Physical Cores | Logical Threads | SMT |
|---|---|---|---|---|
| Intel Xeon 6980P (Granite Rapids) | P-core | 128 | 256 | Enabled |
| Intel Xeon 6990E+ (Clearwater Forest) | E-core | 288 | 288 | Not featured |
| AMD EPYC 9006 top-tier configuration | Zen 6 series | Up to 256 | Up to 512 | Enabled |
This table isn't a performance ranking—it illustrates the differing approaches each company takes to achieve parallelism. Clearwater Forest packs in numerous small E-cores, gaining density through a one-core-one-thread approach. Granite Rapids and EPYC instead give each physical core two execution contexts, redirecting spare execution resources within a core to a separate thread. Even though the logical thread count doubles, the arithmetic units and cache are not duplicated into two full sets.
What Intel is trying to bring back with Coral Rapids is this latter option. While maintaining the single-thread performance of P-cores, in environments with high latency workloads or numerous simultaneous independent requests, idle execution resources can be used to increase throughput per socket.
What matters in server operations is not peak performance over a short burst, but how many jobs can be accommodated within a given power budget and rack count. According to Intel's explanation, a physical core with Hyper-Threading enabled appears to the OS as two logical processors, and vCPUs can be assigned to either one. However, each vCPU doesn't get a dedicated physical core—it shares the resources of the same core through time-slicing. This is why logical thread count cannot be directly equated with computational capacity.
Competing Against Up to 512 Threads
On the same day as Intel's reconfirmation, July 23, AMD put its 6th-generation EPYC 9006 front and center, touting up to 256 cores and 512 threads. While specifications may change, AMD has made thread density a clear selling point for agentic AI, cloud, and virtualization workloads. Given that Intel's current top-tier P-core product tops out at 256 threads, SMT on Coral Rapids isn't merely a return of a spec-sheet feature—it's equipment for competing on socket and rack capacity.
The effectiveness of SMT varies significantly depending on the workload. Intel's support materials generally state that Hyper-Threading improves CPU utilization by roughly 10-30%. Since the number of physical cores doesn't double, performance doesn't double either. Intel itself has explained that for workloads that saturate execution resources with homogeneous computation, such as oneMKL, disabling SMT can actually yield faster performance.
In virtualization, since a single physical core appears as two logical processors, the pool of vCPU candidates that a hypervisor can assign increases. However, adjacent logical processors share execution resources and cache. For VMs requiring performance guarantees, one must consider physical-core-level placement or thread pinning.
Sharing is also a security design consideration. Intel's administrator guidance recommends that in environments where untrusted guests share the same physical core, in addition to microcode and OS-level mitigations, administrators should consider scheduling that isolates guests at the physical core level. Disabling SMT reduces the shared attack surface, but it can also lower overall system throughput. The value lies in giving operators the choice between performance and isolation.
The success or failure of Coral Rapids won't be determined by a spec sheet line reading "SMT is back." What needs to be verified is throughput when physical core count and power envelope are matched, per-thread performance, performance efficiency with SMT enabled, and the effective density that remains in isolated cloud environments. Only once Intel provides those figures along with launch timing will it be possible to gauge whether the roadmap gap can truly be filled.