Jaykihn, a source of hardware information, has reported that Intel's next-generation desktop CPU, "Nova Lake-S," will have a special SKU with 12 Xe3P cores built in. The CPU would total 16 cores: 4 P-cores, 8 E-cores, and 4 low-power E-cores. The maximum turbo power ("PL2") allocated to the integrated GPU (iGPU) is currently said to be 40W, with the chip-wide PL2 at 154W. Intel has not yet published official product specifications. Still, this information alone reveals design conditions where the power delivery circuit and shared memory will determine iGPU performance.
Reading the Two PL2 Figures—40W and 154W—Separately
The 40W figure is not the power consumption of the entire chip, but rather the PL2 allocated specifically to the iGPU. In a post dated August 9, 2026, Jaykihn explicitly stated the chip-wide PL2 as 154W. Both figures are "current" values, and neither represents a guaranteed spec for a shipping product nor a measured power draw. They should be read as upper power limits permitted under short-term load.
The configuration is notated as "4P+8E+4LP-E+12 Xe3P." The first part totals 16 CPU cores, while the final part refers to an iGPU with 12 Xe cores. Intel's current desktop Core Ultra 200S officially supports up to 4 Xe cores according to official materials, so if the leak holds true, the number of Xe cores would triple. However, since the generation, clock speeds, and memory conditions differ, this does not mean performance itself would triple.
The 154W figure is the chip-wide PL2, and the 40W is the PL2 for the iGPU contained within that chip. Since their scopes overlap, these two values cannot simply be added together as independent power budgets for the CPU side and GPU side. To judge actual sustained performance, we would need the production PL1, cooling conditions, and behavior when both CPU and GPU are loaded simultaneously.
The Unconfirmed Requirement of a 2-Phase VCCGT
This SKU reportedly requires a "specific 65W-class PD segment" and a 2-phase VCCGT to achieve maximum graphics performance. VCCGT is defined in Intel's official datasheets as the dynamic power rail that supports processor graphics. In other words, the "2-phase" condition refers not to the main power circuit for the CPU cores, but to the motherboard-side circuit that delivers power to the iGPU.
The 65W figure is not the GPU's power consumption. According to Jaykihn's explanation, deviating either above or below the specified power delivery segment would sacrifice iGPU performance, locking it into a single "macro PD segment." This is a different target from the 40W iGPU PL2 and 154W chip-wide PL2. These three figures cannot be added or subtracted as a single power budget.
If this condition survives into the production version, even CPUs that fit the same socket may not deliver the same iGPU performance on every motherboard. Buyers would need to check not just the CPU compatibility list, but also the VCCGT phase configuration and any firmware restrictions. However, Intel has not disclosed the compatibility, supported chipsets, or performance-limiting mechanisms for this SKU.
What a 20MB L2 Cache Solves—and Doesn't
The GPU's L2 cache is said to be 20MB, which is 4MB, or 25%, more than the 16MB reported by Jaykihn for Panther Lake's 12 Xe-core configuration. Since the iGPU has no dedicated VRAM, it shares system DRAM with the CPU. According to Intel's GPU optimization guide, keeping frequently reused data in L2 can reduce round trips to DRAM. Cache capacity thus serves as a means of conserving bandwidth.
On the other hand, 20MB cannot hold all rendering data. If data evicted from L2 needs to be fetched again, transfers increase, and the GPU ends up waiting on the bandwidth ceiling of each pathway. Even if 40W is allocated to 12 Xe cores to boost computational power, performance won't scale fully if shared memory can't supply data fast enough.
The current Core Ultra 200S officially supports up to DDR5-6400 at 1DPC (one DIMM per channel), but the supported memory speed for Nova Lake-S has not been announced. To gauge the effect of the 20MB L2 cache, we need to measure the production version's memory speed, channel configuration, and effective per-game bandwidth—rather than simply comparing cache sizes.
How Far Do Official Materials Corroborate This?
Intel disclosed plans to introduce Nova Lake in 2026 during its January 2025 earnings call. Compute Runtime 26.22, released in June 2026, also lists Nova Lake among its supported platforms. However, the quality tier is marked as "Early support," which Intel itself defines as initial support without quality expectations.
On the software side, things have progressed a bit further. oneDNN v3.13, released July 17, 2026, explicitly lists performance optimizations for the Xe3p-LPG integrated GPU targeting Nova Lake P. While this corroborates that preparation for Xe3p-LPG is underway within the Nova Lake generation, it does not confirm the 12 Xe-core configuration for Nova Lake-S reported here.
It would be premature to predict actual performance from the 40W and 20MB figures alone. Once Intel officially unveils the product, we'll be able to verify whether the 12 Xe cores survive into mass-production SKUs, how far the 2-phase VCCGT requirement restricts compatible motherboards, and what performance can be achieved with shared DRAM. Only once the total platform cost—including price and compatible boards—becomes clear will we be able to judge whether this CPU is a realistic option for desktops without a discrete GPU.