Dave Plummer used ChatGPT and the circuit board design tool EasyEDA to design a 4MB memory card for the PDP-11. On October 30, 2026 (UTC), he reported that he had booted UNIX using the card he built. The card is an expansion board that combines off-the-shelf memory chips with control circuitry; he did not manufacture the semiconductors themselves. In testing the previous day, the system recognized the memory capacity but failed on access to odd addresses. Recognizing that memory exists is not the same as being able to read and write the specified addresses correctly, and the course of this project shows how important hardware verification is before an AI-assisted design can be made to work on a real machine.
Designing a 4MB Memory Card With ChatGPT
Plummer's motivation for building the card himself was the cost of vintage memory. According to him, PDP-11 memory costs about $1,000 per megabyte, even when it can be found. However, this is a rough figure he gave, and it does not represent an average market price or an actual purchase cost. The project is a personal effort to replace the memory of the PDP-11, which appeared in the 1970s, with modern electronic components.
According to his post on October 29, Plummer worked with ChatGPT's help to create the schematic in EasyEDA, design the board's component placement and routing, and prepare a bill of materials. He ordered five boards for testing. He had board design experience, but this was his first time working with such a complex board, and also his first time programming an FPGA. However, it has not been disclosed what exactly ChatGPT produced at each stage or how much of the human work it replaced.
According to the component configuration described by Tom's Hardware, the design uses a Lattice MachXO2 2000HC FPGA for memory control and connects four 1MB memory chips from ISSI. An FPGA is a semiconductor device whose internal logic circuits can be rewritten. On this board, it receives read and write requests from the PDP-11 and controls the memory chips appropriately. Four 1MB chips provide a total capacity of 4MB. However, installing 4MB worth of chips does not mean that the entire area can be read and written correctly.
Why Recognizing Memory Capacity Was Not Enough
In the first test, Plummer inserted his homemade card into the same backplane as an M8190 and reported that 4M and the area reserved for ROM were recognized. A backplane is a board that connects multiple boards through shared wiring. At this stage, however, access to odd addresses was failing. Even though the memory's presence and capacity were recognized, problems remained in actually reading and writing data.
A helpful reference for understanding this problem is design documentation for the Q-Bridge, published by another developer. A 16-bit word handled by the PDP-11 consists of two bytes. In the Q-Bridge implementation example, the design not only responds to read and write requests from the Q-Bus but also distinguishes between writes to the byte corresponding to the lower, even address and the byte corresponding to the upper, odd address. When a whole 16-bit word is written, a mechanism selects both bytes.
In other words, being able to recognize memory capacity is not enough; control that reads and writes the appropriate byte for the requested address is also required. A failure on odd-address access does not mean one can conclude that only 2MB is actually usable or that half of the memory chips are defective. However, the Q-Bridge is a separate design from Plummer's memory card, and there is no evidence that the same circuit configuration or control code is used. While the documentation is useful for understanding odd-address access control, it does not identify the cause of this particular problem or the specific fix.
Fixing the Faults and Booting UNIX
Plummer also went through trial and error in programming the FPGA. He prepared a bitstream, the data that configures the FPGA's internal logic circuits, and wrote it using an FT232H and openFPGALoader. He explained that he struggled with handling the compressed bitstream. However, even if programming the FPGA succeeds, the configured circuit will not necessarily operate correctly in response to requests from the PDP-11.
In actual operation checks, a problem occurred in a different test even after he fixed the odd-address access fault. Plummer then revised the FPGA code and reported in his October 30 post that UNIX had booted successfully. The table below organizes the progress of verification in order of publication, based on the October 29 post and its replies and the October 30 post. All times are UTC posting times and are not necessarily the times when the fixes were actually made.
| Published (UTC) | Status reported by Plummer | Verification stage confirmed |
|---|---|---|
| October 29, 2026, 18:22 | Recognized 4M and the ROM-reserved area, but access to odd addresses failed | Capacity recognition succeeded, but memory access problems remained |
| His reply following the original October 29 post | Fixed the odd-byte problem, but failed test pattern 3 | A problem occurred in a different check after the first fault was fixed |
| October 30, 2026, 00:04 | Fixed the FPGA code and reported passing all tests and booting UNIX in multi-user mode | OS boot confirmed on his own hardware |
In his October 30 post, Plummer reported that all tests passed and that he was able to boot UNIX in multi-user mode. On the first day, the card had only reached the point of having its memory capacity recognized, but after fixing the faults, it got as far as running an operating system. However, "all tests" here refers to the tests he ran himself, and details such as the specific test items, run times, and memory regions covered have not been provided. Booting UNIX is an important step that supports operation on real hardware, but it does not prove correct operation of every address or long-term stability.
The Potential and Challenges of AI-Assisted Hardware Design
In this project, a memory card designed with ChatGPT's help reached the point of booting UNIX after code fixes and verification on real hardware. While AI can help advance hardware development for old computers, the project also underscores that whether a design communicates correctly with real equipment and works as expected can only be learned through testing on that equipment. However, it is unclear whether the faults found during development stemmed from the AI-generated design, or how much the AI was involved in the fixes. To evaluate AI's design ability, it is necessary to distinguish not only the fact that AI was used but also which tasks it was given and what results it produced.
On cost, Plummer's figure of about $1,000 per megabyte alone does not show how much money was saved by building the card himself. The information needed to calculate total cost, such as board manufacturing, component purchases, and time spent on design and verification, has not been provided. Nor can this report of operation confirm whether the finished card will be sold or whether it is compatible with other PDP-11 configurations.
Going forward, users who maintain similar vintage computers will need information such as the revised FPGA code and what was changed, the range of memory addresses tested, and stability during long runs. If third parties publish reproduction results, it will be easier to judge whether the card works properly outside Plummer's own environment. The achievement is one example of how AI-assisted redesign of vintage hardware could lead to practical operation. Whether the design data and detailed verification results are published will be important in judging how applicable the work is to other PDP-11 users.