When a startup foundry with no volume-production track record says it will "sell for less than the world's biggest player," skepticism is the natural reaction. In the semiconductor industry, public price pledges don't always translate into orders or profits. On July 8, 2026, Atsuyoshi Koike, president and CEO of Rapidus, went on the record about the company's 2nm chip pricing at a seminar in Karuizawa, Nagano Prefecture. He said the company would aim for a level "at least the same as, or slightly lower than" TSMC's. But when you check the primary sources on who the reported price actually refers to, and on the technical and financial evidence behind it, the picture is more complicated than a simple "price war" headline.
The "Below TSMC" Pricing Policy Unveiled at a Karuizawa Seminar
The seminar was hosted by the Japan Productivity Center. Koike explained Rapidus's pricing policy for its 2nm semiconductors, which are slated for volume production in the second half of fiscal 2027, using TSMC's products as the benchmark: "We will respond at a level that is at least the same as, or slightly lower than, TSMC's." The reference price he cited was ¥3 million to ¥3.5 million per wafer, equivalent to about $18,500 to $21,600 at the exchange rate of around ¥162 to the dollar as of July 10, 2026.
The start of volume production is sometimes described as "2027," but the Ministry of Economy, Trade and Industry (METI) implementation plan specifies the "second half of fiscal 2027." The latest pricing remarks were made on that premise.
"We acknowledge that TSMC holds a dominant position in the 2nm semiconductor market, and we are not in a position to set prices independently. We will use TSMC's prices as our benchmark," Koike said, making clear that Rapidus intends to match TSMC's market rate rather than set its own. Separate reports say the company is in talks on contract manufacturing agreements with more than 60 companies, most of them overseas.
The remarks were quickly framed as "Rapidus to undercut TSMC." Yet a look at the documents that were actually published shows that even the subject of the reported price was open to interpretation. The number is the same, but what it means depends on whose price it refers to.
Whose Price Is "¥3–3.5 Million"?
Bloomberg was the first to report the figure. Its dispatch at 12:56 on July 8, 2026 described it as Rapidus's own price: President Atsuyoshi Koike "plans to decide with ¥3 million to ¥3.5 million as a reference." But a Jiji Press article distributed at 18:00 the same day wrote, "TSMC is ahead in mass production of 2nm semiconductors, and the price is projected at ¥3 million to ¥3.5 million per wafer," and the Japan Times English article carrying Jiji's wire conveyed the same sense. Read at face value, it could be taken to mean that TSMC itself had said it would sell its 2nm wafers at that price. Over the course of the day, room for interpretation had opened up between articles reporting the same remarks.
The key to resolving the discrepancy lies in Rapidus's own official statement, issued on July 9, 2026. In the statement, titled "Statement Regarding Estimated Wafer Price," the company explained that "the estimate of the wafer unit price at mass production reported by some media is based on remarks made at the seminar and does not necessarily reflect actual selling prices." The statement addresses the estimate of Rapidus's own wafer price at mass production; it does not refer to the price of TSMC's products.
Rapidus's statement also explains that actual selling prices will vary depending on each customer's product specifications and on exchange-rate fluctuations. Without that caveat, cutting out only the conclusion "below TSMC" makes it easy to misread the remarks as a firm declaration of discount pricing.
What Koike said was the limited formulation of "using TSMC's prices as the benchmark," and the way this came across as though it were a price announcement by TSMC itself appears to be behind the confusion. In any case, the subject of the ¥3–3.5 million figure (about $18,500–$21,600) is Rapidus itself, not a price published by TSMC. Keeping this point in mind changes the meaning of the price comparisons that follow.
Putting 2nm Price Levels for TSMC, Samsung, and Rapidus Side by Side
TSMC's 2nm wafer price is estimated at about $30,000 per wafer, according to figures industry media have repeatedly reported since August 2025. TSMC has not officially announced pricing, and industry sources say it does not plan to offer discounts. Set against this estimate, the position of Rapidus's reference price becomes clear.
- TSMC: about $30,000 per wafer (industry estimate, unofficial)
- Samsung: about $20,000 per wafer (2nm process, industry estimate, unofficial; about 33% below TSMC)
- Rapidus: $18,500–$21,600 per wafer (¥3–3.5 million, company's own reference price)
Price competition in advanced logic rests on different premises than in mature nodes. Cutting-edge processes such as 2nm involve development and capital expenditure costs on a different order of magnitude, and yields tend to be unstable in early production. Choosing to compete on price anyway is one distinguishing feature of Rapidus's strategy. Because the number of good chips obtainable from a single wafer is tied directly to yield, whether the reference price ultimately holds cannot be judged from the figures disclosed at this stage alone.
Laying out the numbers shows where Rapidus stands. The low end of its target, $18,500, is roughly 7% cheaper than Samsung's $20,000, while the high end, $21,600, is roughly 8% more expensive. In other words, Rapidus's reference price range overlaps almost entirely with Samsung's, not TSMC's. Compared with TSMC's estimated $30,000, it is about 38% lower at the low end and about 28% lower at the high end.
Koike said Rapidus would "use TSMC's prices as the benchmark," but it can also be read as saying the real competitor is Samsung. According to Korean media reports, TSMC has told major customers such as NVIDIA, Apple, and AMD that it will raise prices for its 3nm, 5nm, and 7nm processes by 5–10%, and Samsung is also reportedly raising prices for new customers by about 15% on 4nm, 5nm, and some 8nm (automotive) processes. As the two incumbents move to raise prices, Rapidus is trying to enter the cutting-edge 2nm domain at a discounted price.
The effects extend to Japanese readers, too. Whether Rapidus's price competition succeeds will also feed back into orders for domestic equipment makers, such as Tokyo Electron, that supply front-end equipment to the company. If low-price orders secure volume, equipment investment expands; if the company loses the price fight and production shrinks, the ripple effect runs in the opposite direction.
The Technical Basis for Discussing Prices With Zero Mass-Production Record
Rapidus's technical foundation is a license from IBM. In 2021, IBM announced what it called the world's first 2nm GAA (gate-all-around) process technology, and Rapidus has developed its 2nm logic semiconductors with this technology licensed to it. Its technical partnerships extend beyond IBM. In chiplet packaging for back-end processes, it has also built cooperative arrangements with Germany's Fraunhofer and Singapore's A*STAR IME, putting a framework in place that teams up with multiple research institutions. Asserting a pricing policy requires this kind of production-capability backing.
GAA is a technology that makes up for the weaknesses of FinFET, the structure that has been mainstream until now. In a FinFET, the gate covers the sides and top of a fin-shaped channel, and as miniaturization advances, it becomes harder to suppress current leakage. GAA wraps the gate around the channel on all sides, improving current control and enabling miniaturization at the 2nm generation. Better control makes it easier to curb wasted current flowing through a transistor even at the same voltage, creating room to raise processing performance per unit of power consumption.
Progress toward volume production is also under way. Rapidus broke ground in September 2023 at its production site in Chitose, Hokkaido (which the company calls IIM), and in April 2025 it started operating, as planned, a pilot line equipped with more than 200 major pieces of manufacturing equipment. According to CTO Kazunari Ishimaru, the line has been built as a manufacturing flow of well over several hundred process steps.
About three months after operations began, in July 2025, the company announced that it had finished acquiring electrical characteristics of 2nm GAA transistors prototyped on this line. This refers to the stage at which the electrical properties of individual transistors could be measured; it does not extend to confirming the operation of finished chips. About one year and ten months passed from groundbreaking to this milestone, and it can be confirmed that progress has followed the original plan.
The scale of more than 200 major pieces of equipment and well over several hundred process steps indicates a demonstration level just short of volume production. Pilot lines are designed to reproduce the same processes as actual mass-production lines, and the usual procedure is to verify yields and equipment utilization there before moving to the volume-production line. What Rapidus had confirmed as of July 2025 was the acquisition of electrical characteristics; CTO Ishimaru explained that the company is at the stage of "working on further improving characteristics and preparing for volume production," and yield verification and the transition to a mass-production line are still ongoing.
Without evidence that prototype transistors actually exhibit electrical characteristics, a pricing policy would be mere wishful thinking. In that sense, this technical demonstration supports the credibility of the pricing remarks. However, the acquisition of electrical characteristics and yield (the rate of good chips) at mass production are different metrics, and a demonstration at this stage alone does not guarantee profitability at volume production.
The Elpida Lesson and What ¥2.9 Trillion Means
In 2009, DRAM maker Elpida Memory received a ¥30 billion preferred-share investment from the Development Bank of Japan, along with roughly ¥100 billion in syndicated loans from the bank and a group of private banks, but went bankrupt in 2012. In a fiercely price-competitive commodity market, public-fund support alone was not enough to win the competition. Factors cited for the failure include management decisions in which the premium DRAM business it positioned as its core failed to capture the expected demand, delays in shifting general-purpose DRAM production to Taiwan, and shortcomings in industrial policy, as METI did not take sufficient additional measures after the 2009 public support. The precedent shows that state-backed semiconductor support does not necessarily lead to success.
The scale of support for Rapidus is on a different order of magnitude. On November 21, 2025, METI indicated it expected to provide additional support of about ¥630 billion in fiscal 2026 and about ¥300 billion in fiscal 2027, and said the cumulative government support including these amounts would reach about ¥2.9 trillion. The figures at that point were projections in the funding plan; the fiscal 2026 portion was formally approved on April 11, 2026 at ¥631.5 billion, while the fiscal 2027 portion is to be examined in detail later in light of progress. Rapidus's own business plan reportedly foresees cumulative investment, including private-sector funds, of more than ¥7 trillion.
¥2.9 trillion works out to roughly 22 times the total funding Elpida received (¥30 billion in preferred shares from the DBJ plus about ¥100 billion in syndicated loans from the DBJ and private banks, about ¥130 billion in all). However, the latter includes loans from the private bank group, so it is not a straightforward comparison of public funds. Even so, Rapidus's ¥2.9 trillion is public support from the national budget, and its scale is not small as a burden on Japanese taxpayers.
Beyond the difference in the scale of support, the nature of the market also differs. The DRAM that Elpida competed in is a standardized commodity product whose price is determined mainly by production volume and yield. The 2nm logic semiconductors Rapidus is targeting are high-value-added products whose designs differ by customer, and it has a foundation in technology licensed from IBM. Even if both are "government-backed semiconductor makers," the structures of the markets they compete in are different.
Still, the size of the support does not guarantee success. Rapidus is targeting a stock market listing around fiscal 2031, so it will be some time before its profitability as an independent business is tested. The ¥2.9 trillion figure is merely a gauge of the staying power to sustain its pricing policy over several years.
Two Undisclosed Numbers: Contracts and Yields
While talks with more than 60 companies (mostly overseas) have been reported, the names of customers that have concluded volume-production contracts and order volumes have not been disclosed. One of the few collaborations made public is with Tenstorrent. But this is not a commercial volume-production customer contract. It was announced as joint development and manufacturing cooperation on an edge AI accelerator using 2nm logic with Tenstorrent, a U.S. RISC-V chip design company, as part of an R&D project promoted by the Leading-edge Semiconductor Technology Center (LSTC), a technology research association, under a commissioned project of NEDO (the New Energy and Industrial Technology Development Organization). Order volumes and contract amounts for the volume-production phase planned for the second half of fiscal 2027 have not been made clear under this framework either.
There is a large distance between "in negotiations" and "volume-production contract signed." As NVIDIA, Apple, and AMD, which are among TSMC's major customers, illustrate, the main buyers of cutting-edge logic semiconductors are fabless companies making products for data centers and high-performance applications, but no customer names at Rapidus's production scale have yet emerged. Even taking the materials so far into account, there is still not enough to judge the feasibility of the pricing policy.
With the counterparties in volume-production contract talks unknown, the yardsticks for measuring the policy's effectiveness are limited. If contracts are announced, that would at least be evidence that customers judged the reference price to be acceptable. Conversely, if contract announcements drag on, it becomes more likely that the ¥3–3.5 million figure remains a target on paper. With volume production targeted for the second half of fiscal 2027, it would be too late if customers were only locked in right before production starts. Whether and when contracts are announced is itself the next indicator of how credible the pricing policy is.
The other undisclosed figure is yield. What was confirmed in July 2025 was the fact that electrical characteristics of GAA transistors were obtained; what share can be shipped as good products at the volume-production stage is a separate number. If yield is low, the effective cost per good die (chip) obtained from one wafer could exceed what the reference price assumes, making it hard to maintain the pricing policy.
If Rapidus's contracts are actually concluded, they could give TSMC and Samsung reason to review their 2nm pricing strategies. Both have already moved to raise prices at other nodes, and the possibility of a ripple effect on the 2nm-generation market rate is not zero.
The Yomiuri Shimbun and others have reported that Rapidus has in view starting 1.4nm production in 2029 and building a second fab in Chitose. However, Rapidus itself has stated on its official website that the series of reports on construction and operation of a 1.4nm fab is "speculation" and not something the company has put out, so the timing and scale remain unconfirmed. Whether this plan actually gets moving will be the next clue to whether 2nm volume production and pricing are proceeding as planned. If the two numbers, named customers and yields, are disclosed and volume production in the second half of fiscal 2027 proceeds on schedule, the footing for the second Chitose fab and the 2029 1.4nm plan will be firmer. Whether "below TSMC" ends as a number on paper or becomes real commerce will be decided by whether that footing gets built.