On November 14, 2026, RIKEN and the Japan Science and Technology Agency (JST) announced a method that reduces the resources needed to prepare states in an existing quantum error-correcting code, which protects quantum information from errors. Hayato Goto and Hisashi Kamata (the Japanese-language release names them as 鹿俣尚志 and 後藤隼人) at the RIKEN Center for Quantum Computing designed the circuits and evaluated their performance through numerical simulation. The proposed method cuts the number of physical qubits required for a state-preparation circuit that includes error verification from 180 in the conventional six-copy approach to 84.
The study targets a scheme that encodes 6 logical qubits into 30 physical qubits. A logical qubit is a unit that protects quantum information by distributing it across multiple physical qubits. The 30 qubits that make up the code itself and the 84 in the preparation circuit, which includes auxiliary qubits for verification, count different things. The team also reduced the number of two-qubit operations in a circuit that creates a particular initial state from 108 to 67.
The results were published in the peer-reviewed journal Science Advances as the paper "Fault-tolerant quantum computing with high-rate symplectic double codes" by Kamata and Goto (DOI: 10.1126/sciadv.aec4142). The publication date was November 13 in U.S. time, which is November 14 in Japan.
Thirty physical qubits protect six logical qubits, but state preparation needs extra resources
Quantum error correction distributes quantum information across multiple physical qubits so that errors can be detected and corrected. The "symplectic double code" examined in this study is a code, which records 6 logical qubits in 30 physical qubits. The final 5 is the code distance, an indicator of tolerance to errors. The code rate is 6 divided by 30, or 20%, but this figure does not include the auxiliary qubits used for state preparation and verification.
This code is derived by doubling a non-CSS code that records 3 logical qubits in 15 physical qubits and converting it into a CSS code. Because CSS codes can handle bit-flip and phase-flip errors separately, they make it easier to perform logical CNOT gates between code blocks.
However, even with a high code rate, preparing a logical state while verifying errors requires additional physical qubits. In Figure 2 released by RIKEN, the configurations of the state-preparation circuits for the proposed method and the conventional six-copy method are compared as follows.
| Item | Physical qubits | What is counted |
|---|---|---|
| One code block | 30 | Records 6 logical qubits |
| Proposed preparation circuit | (30 + 12) × 2 = 84 | Two sets, each with 12 auxiliary qubits for verification |
| Conventional six-copy method | 30 × 6 = 180 | Uses 6 copies for verification |
The figures 84 and 180 are the numbers of physical qubits making up the preparation circuit. They differ from the average resource count including retries and from the number of qubits installed in a whole device. The code rate alone does not reveal how many resources are needed to prepare and verify a state. This study aimed to make the verification circuits smaller while taking advantage of the code's high rate.
CNOT gates needed to prepare the plus state cut from 108 to 67
The team first optimized an encoding circuit that puts all six logical qubits into the "plus state." The plus state is a basic quantum state that superposes 0 and 1 with equal probability amplitudes. The number of CNOT gates required for this circuit fell from 108 to 67. A CNOT is a two-qubit operation that flips one qubit depending on the state of another.
Reducing the number of operations alone, however, does not address errors that occur during state preparation. Through CNOTs, a single error can spread to multiple qubits and cause correlated errors. The team extended a verification method Goto had previously developed for Steane codes and designed a circuit that detects harmful phase-flip errors through selective logical measurements. It also verifies bit-flip errors by performing CNOTs between two code blocks and examining the measurement results.
If an error is detected, the output is discarded and state preparation starts over. The number of physical qubits and the number of CNOT gates are different resource metrics. This study combines optimizing the circuit that creates the state with making the mechanism that verifies the prepared state less resource-intensive.
Numerical simulation shows error rates as low as the conventional method
The team set up a noise model in which errors occur in each quantum circuit operation and evaluated performance with Monte Carlo simulations using the quantum circuit simulator Stim. The proposed method showed a logical CNOT error rate as low as that of the conventional six-copy method. This is a numerical evaluation based on assumed noise conditions, not an experimental result from an actual quantum computer.
According to the authors' published paper, the evaluation prepared two error-free logical Bell states, then repeated a faulty logical CNOT and quantum error correction for 10 rounds. The quantum entanglement was then undone with ideal operations, and the results of ideal measurements were decoded using a lookup table. The error probability was estimated by checking whether the outputs of all six logical qubits were consistent with the inputs. The 10 rounds refer to the number of repetitions of operations within the evaluation circuit; the public version we checked does not state the total number of Monte Carlo trials.
In the noise model, the error probability of physical operations was set to . After each physical CNOT, each of the 15 nontrivial two-qubit Pauli errors was assumed to occur with probability , and qubit initialization and measurement were also given bit-flip errors with probability . Memory errors that arise while quantum information is held, and single-qubit gate errors, were not included in the evaluation. Judging performance on real hardware will require accounting for these errors as well.
Support for arbitrary quantum states and the need for hardware verification
The team also proposed an encoding circuit that converts six arbitrary input states into their corresponding logical states. This makes the design able to take in a variety of input states into the code space, not just a specific plus state. Using it for general-purpose quantum computation would require combining it with fundamental operations such as magic state distillation.
As a next step, the authors cite experimental implementation on quantum hardware such as trapped ions and neutral atoms. Optimizing circuit compilation is another technical challenge. The source code, job scripts and data needed to reproduce the numerical results and figures have been made public, but the materials we reviewed did not show any replication by third parties.
In evaluations on real devices, hardware-specific noise and qubit connectivity constraints will matter, as will resource consumption including retries after errors are detected. Whether the method can retain its demonstrated resource savings in state preparation under such conditions remains the key question for practical use.