A technology long regarded as the "theoretical ideal" in power semiconductor evolution—yet blocked from commercialization by extreme manufacturing difficulty—has finally broken through the lab wall. AlkaidSemi, a Shanghai-based power semiconductor company, announced on September 7, 2026 the commercialization of the world's first silicon carbide (SiC) superjunction MOSFET.
The device is the result of five years of industry-academia collaboration with a research team led by Hao Yue, a member of the Chinese Academy of Sciences and professor at Xidian University, combined with joint process platform development by UNT (Shanghai United NanoTech), a major Chinese automotive and power semiconductor foundry. According to the published specifications, the device achieves a breakdown voltage of 1,635V, with a specific on-resistance () of just 1.27 at room temperature (25°C) and only 1.5 even at a high temperature of 175°C. The device has already passed AEC-Q101 automotive component certification, and qualification processes are underway for initial applications in high-voltage DC power delivery for AI data centers and next-generation electric vehicle (EV) high-voltage systems.
1,635V Breakdown Voltage and Zero Temperature Drift: The World's First SiC Superjunction Device
The most striking figures in the electrical characteristics of this newly announced device are the extraordinarily low specific on-resistance achieved at the high breakdown voltage of 1,635V, and its unusual temperature dependence.
For power MOSFETs in general, the figure of merit that determines device value is how low the on-resistance can go while maintaining breakdown voltage. According to data released by AlkaidSemi, the specific on-resistance at room temperature (25°C) is 1.27 , and it remains as low as 1.5 even under the harsh condition of a 175°C junction temperature.
| Operating Temperature Condition | Specific On-Resistance () | Notes |
|---|---|---|
| 25°C (Room Temperature) | 1.27 | Extremely low conduction loss for a 1,635V-class high-voltage device |
| 125°C (Rated Operating Range) | 1.27 | Achieves "zero temperature drift" in on-resistance across 25°C–125°C |
| 175°C (Extreme High Temperature) | 1.5 | Temperature coefficient under 1.2x relative to room temperature (conventional SiC: 1.8–2.2x) |
What is even more engineering-significant is that the device achieves a "zero temperature drift," with virtually no increase in conduction resistance across the 25°C to 125°C range—the core temperature band in which power conversion equipment actually operates. Even at 175°C, the temperature coefficient stays below 1.2x relative to room temperature. In conventional planar or trench-type SiC MOSFETs, rising temperature intensifies lattice scattering (phonon scattering), reducing electron mobility—a well-established physical phenomenon that typically causes on-resistance at 175°C to balloon to 1.8 to 2.2 times its room-temperature value. By suppressing this high-temperature resistance increase to below 1.2x, the device reportedly achieves a 166% improvement in current density at high operating temperatures compared to the leading international commercial benchmark, along with an 81% improvement in power density.
Why SiC "Superjunction" Was So Difficult: The Charge-Balance Wall Beyond Silicon's Limits
Superjunction technology itself has already been commercialized in silicon (Si) power semiconductors, where it overturned conventional wisdom about high-voltage MOSFETs. Germany's Infineon Technologies is a prime example, with its "CoolMOS" series.
In conventional unipolar power MOSFETs, maintaining breakdown voltage requires thickening the drift layer and reducing impurity concentration—a design constraint that binds devices to the so-called "silicon limit" (or unipolar limit), in which theoretical specific on-resistance deteriorates sharply as breakdown voltage rises. Superjunction technology addresses this by arranging fine, alternating P-type and N-type pillars periodically within the drift region. When reverse voltage is applied to the device, lateral full depletion progresses between the P and N pillars, transforming the internal electric field distribution from the conventional triangular shape into a uniform rectangular one. This allows the N-type pillar's impurity concentration to be raised by orders of magnitude while maintaining high breakdown voltage, dramatically reducing specific on-resistance to a relationship that is nearly linear with breakdown voltage.
However, applying this excellent superjunction structure to silicon carbide (SiC) has remained an unconquered frontier despite years of research by major semiconductor makers worldwide, due to the extremely high barrier to mass production. This is rooted in enormous obstacles related to miniaturization, charge balance, and heat diffusion—all stemming from SiC's unique physical properties.
First is the demand for extreme miniaturization. SiC has a breakdown electric field strength roughly ten times that of silicon. While this allows the drift layer itself to be thinner, the pillar width required to produce the superjunction effect demands a scale of microfabrication far beyond what is needed in silicon.
Second is the strict control of "charge balance." A superjunction's ability to maintain breakdown voltage depends on the premise that the total acceptor charge in the P-pillars exactly equals the total donor charge in the N-pillars. In a miniaturized pillar structure, even the slightest deviation from this charge equilibrium causes electric field concentration, causing breakdown voltage to collapse dramatically from its design value.
Third—and the greatest obstacle of all—is the impossibility of thermal diffusion in SiC crystals. In silicon, deep wells and pillars can be formed relatively easily because implanted impurities diffuse through the silicon during high-temperature annealing. In SiC, however, whose bonding energy is extremely strong, the thermal diffusion coefficient of impurities is essentially zero, making it fundamentally impossible to create deep pillars through thermal diffusion.
To create deep, high-aspect-ratio pillar structures in SiC, manufacturers must either stack numerous ultra-thin epitaxial growth layers combined with high-energy ion implantation in a "multi-step epitaxy and multi-step ion implantation" process, or use reactive ion etching to carve high-aspect-ratio deep trenches and then grow defect-free P-type SiC crystal within those narrow trenches to fill them completely—a "trench etching and epitaxial refill" method. Both approaches make it extremely difficult to control uniform impurity concentration and geometric shape across the wafer surface while suppressing crystal defects, and both drive process costs sharply upward. This is precisely why, even in the roadmaps of the world's major semiconductor makers, practical SiC superjunction devices were not expected before 2027 to 2031 at the earliest.
The breakthrough achieved here lies in the fusion of Hao Yue's team's deep expertise in wide-bandgap semiconductor physics and device design with UNT's advanced process control capabilities on its cutting-edge power semiconductor manufacturing line—culminating, after five years of trial and error, in a mass-production process platform capable of achieving true charge balance.
Where the Device Truly Shines: How a 166% Boost in High-Temperature Current Density Transforms Systems
The greatest strength of AlkaidSemi's SiC superjunction MOSFET is not just its excellent low-resistance characteristics at room temperature, but its dramatic performance advantage under the actual high-temperature conditions in which power conversion equipment operates.
In power electronics design, loss calculations for power semiconductors are based not on room temperature but on junction temperature under rated load. In conventional trench-type or planar-type SiC MOSFETs, no matter how impressive the room-temperature specifications may look on a datasheet, on-resistance increases 1.8 to 2.2-fold as junction temperature rises to 175°C. As resistance climbs, steady-state conduction loss also rises, triggering further self-heating that severely constrains thermal design. As a result, system designers have had no choice but to oversize devices, connect multiple devices in parallel, or install large heat sinks in anticipation of worst-case high-temperature resistance.
In contrast, a superjunction device with zero on-resistance temperature drift from 25°C to 125°C, and a resistance increase of under 1.2x even at 175°C, fundamentally breaks the chain reaction of heat generation during high-temperature operation. Because resistance does not increase within the rated operating temperature range, conduction losses under actual operating conditions can be dramatically suppressed.
The 166% improvement in current density at high temperature means it may be possible to substantially reduce the chip area required to achieve the same current-carrying capacity. A smaller chip area also significantly reduces parasitic capacitances such as gate capacitance and output capacitance, enabling higher switching frequencies and allowing passive components like inductors and transformers to be made smaller and lighter. At the same time, the 81% improvement in power density can dramatically shrink the overall volume of power units and drastically reduce the thermal load placed on cooling systems.
Toward AI Data Centers and Next-Generation EVs: Mass-Production Readiness and Remaining Challenges
AlkaidSemi has positioned high-voltage DC power delivery systems for data centers and high-density power units for AI servers as the first application targets for this SiC superjunction MOSFET.
With the spread of generative AI, the latest AI accelerators consume extremely large amounts of power per rack. To supply this enormous power demand, data center power delivery topologies are shifting away from conventional AC reception and low-voltage distribution toward high-voltage DC power delivery, in which high-voltage DC is received in bulk and stepped down with high efficiency near the server rack. AI server power supplies must also meet ultra-high efficiency standards while achieving the extreme power density required to fit within limited rack space. A SiC superjunction MOSFET combining a 1,635V breakdown voltage with zero temperature drift at high temperature offers a direct solution to these demanding design requirements for AI power infrastructure.
Looking further ahead, the company also envisions applications in main-drive inverters and fast-charging onboard chargers for new-energy vehicles (EVs), power conditioners for solar power generation, and industrial smart grids. The fact that the device has already obtained AEC-Q101 automotive reliability certification is evidence that the company designed its development from the outset to meet automotive-grade process standards.
That said, even though the technology has transitioned from the laboratory stage to a pilot mass-production platform, challenges remain to be verified before full-scale market adoption.
The first challenge is mass-production yield and cost competitiveness. Superjunction processes involving the formation of high-aspect-ratio pillars and strict impurity control require more process steps than conventional planar or trench structures, which tends to drive up manufacturing costs. Whether the company can suppress variation in charge balance across the wafer surface and maintain stable, high yields will determine its price competitiveness against existing SiC trench MOSFETs.
The second challenge is demonstrating long-term reliability under harsh real-world conditions. Even having passed AEC-Q101 testing, questions remain about whether the long-term reliability of the gate oxide, degradation of the parasitic diode under continuous current, and tolerance to sudden short-circuit events are sufficiently guaranteed under the constant high-temperature, high-voltage conditions found in real-world vehicle operation and continuous data center operation. Answering these questions will require accumulating long-term data through actual market deployment.
Also worth watching is how competing companies in Europe, the United States, and Japan—which have long led the world in power semiconductors—will respond going forward. Major semiconductor makers including Infineon, STMicroelectronics, and ROHM have been pushing the limits of SiC through trench gate miniaturization and proprietary cell layout improvements, while also quietly pursuing their own SiC superjunction research and development behind the scenes. With a Chinese industry-academia team now taking the lead in announcing a commercial product, the competition over the technology roadmap for next-generation high-voltage SiC devices is rapidly shifting from a research and development race to a race over the speed of mass-production readiness.