On September 4, 2026, Bloomberg reported, citing people familiar with the matter, that DeepSeek plans to deploy at least 160,000 of Huawei's next-generation AI accelerator, the Ascend 950DT, at a data center it is building in Ulanqab, Inner Mongolia. The chips will be used exclusively for inference; model training will continue to run on NVIDIA GPUs. Huawei currently lacks the manufacturing capacity to fulfill this order in one batch—component shortages, including advanced memory, are expected to limit 2026 production of the 950DT to "roughly 200,000 to 300,000 units"—meaning full delivery could take more than a year, according to the report. Notably, Huawei already published a specification in September 2025 for a configuration linking more than 520,000 units of the 950DT together. The 160,000 figure falls far short of that scale, and the gap stems from component supply constraints rather than any lack of computing headroom. The decision to limit deployment to inference traces back to a failed training attempt with R2 a year earlier and to the 950DT's memory-oriented design.

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The Bloomberg Report: At Least 160,000 950DT Units for a 1GW Facility

The Bloomberg article, bylined by Mackenzie Hawkins and Haze Fan, notes that neither DeepSeek nor Huawei provided on-record comments. The deployment site is a data center in Ulanqab, and the chips in question are at least 160,000 units of Huawei's 950DT. DeepSeek will use them for inference—that is, running trained models to generate responses—not for training. According to Bloomberg, DeepSeek previously attempted to train models on Huawei chips but continues to rely on NVIDIA hardware for that process.

The same report states that DeepSeek has lobbied Beijing authorities to increase and accelerate its allocation of Huawei chips. The term "allocation" appears because the 950DT has not yet launched commercially; Huawei is currently in the process of distributing its limited 2026 production capacity among multiple customers.

The data center itself is not new information. Bloomberg reported on July 30 that DeepSeek was securing roughly 1GW of computing capacity in Ulanqab through a combination of self-built and leased facilities, with plans to bring part of it online by late 2027 or early 2028. At that time, the specific chips to be used were unknown—this latest report fills in that gap. Ulanqab is located roughly 350km northwest of Beijing, and DeepSeek posted job listings in April for data center operations engineers and delivery managers in the city, offering monthly salaries of 15,000 to 30,000 yuan. This job posting was the first public signal of DeepSeek's shift from a company that rents cloud capacity to one that owns its own infrastructure.

The financial groundwork is also falling into place. In June, DeepSeek raised outside funding for the first time since its founding, securing 50 billion yuan (approximately $7.4 billion, or roughly ¥1.1 trillion). Based on disclosures from Chinese investors, the company's valuation is estimated at around 350.9 billion yuan (approximately $51.8 billion), and Reuters has reported that a subsequent funding round of similar size is being planned. NVIDIA CEO Jensen Huang has estimated that building a 1GW-class facility with cutting-edge chips costs roughly $50 billion, though Bloomberg notes that construction costs in China tend to be lower. DeepSeek's total investment figure and the breakdown of the 1GW capacity (whether referring to IT load or total facility power) have not been disclosed.

Putting 160,000 Units in Context: Huawei's Published Specs and Operating Clusters

To understand what 160,000 units actually represents, it helps to compare the figure against both Huawei's own published configurations and the largest domestic clusters currently in operation. At Huawei Connect 2025 on September 18, 2025, Huawei unveiled the Atlas 950 SuperPoD, which links up to 8,192 units of the 950DT, and the Atlas 950 SuperCluster, which connects "more than 520,000" units of the 950DT. Computing performance is rated at 8 EFLOPS (FP8) for the SuperPoD and 524 EFLOPS (FP8) for the SuperCluster, with both slated for rollout in Q4 2026. Meanwhile, the largest publicly confirmed operating cluster built on domestic chips is a roughly 10,000-card cluster of Ascend 910C units brought online in Shenzhen on March 26, 2026, delivering 11,000 PFLOPS of computing power, with framework agreements signed by around 50 organizations. A reported 92% reservation rate reflects the combined total across two phases, including previously operational capacity, not the new expansion alone.

Comparing raw unit counts across these configurations yields the following. Calculations are based on simple division of accelerator counts per cluster; the SuperCluster figure uses the lower bound of "more than 520,000" and is rounded to one decimal place.

Comparison Accelerator Count Ratio to 160,000 Status
Atlas 950 SuperPoD (950DT) 8,192 units ~19.5x Huawei published spec, planned Q4 2026 rollout
Atlas 950 SuperCluster (950DT) 520,000+ units ~31% (roughly 30%) Huawei published spec, planned Q4 2026 rollout
Shenzhen 10,000-card cluster (910C) 10,000 units 16x Operational since March 2026

Compared to the operational domestic cluster in Shenzhen, DeepSeek's plan represents a 16-fold increase—a significant step up from existing domestic deployments. But measured against the 520,000-plus units Huawei has laid out as a specification, it reaches only about 30%. Bloomberg's characterization of the deployment as "one of the largest known clusters" is consistent with this positioning.

Some caveats apply to this comparison. The 160,000 figure is a planned minimum ("at least"), while the SuperPoD and SuperCluster represent specific configurations Huawei has published—neither reflects actual operational deployment. Only the Shenzhen cluster can be confirmed as operational. The chip generations also differ between the 950DT and 910C, so these unit-count ratios should be read as indicators of scale rather than performance comparisons.

Still, the underlying fact remains: 160,000 units falls well short of the largest configuration Huawei itself has specified. And the gap between that maximum configuration and the actual order size stems not from computing architecture limitations, but from component supply constraints discussed below.

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Why Inference, Not Training? The 144GB, 4TB/s Decode-Optimized Design

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The Financial Times reported on August 14, 2025, citing three sources familiar with the matter, that after releasing R1, DeepSeek attempted—with backing from Chinese authorities—to train R2 using Ascend chips. Despite having Huawei engineers on-site, the company was unable to complete the training run and ultimately settled into a division of labor: training on NVIDIA, inference on Ascend. DeepSeek's decision to limit the 950DT to inference use extends this arrangement from a year earlier. TrendForce reported on April 7, 2026, that DeepSeek V4's inference workloads would also run on the Ascend 950PR (described as primarily inference-oriented). The current 160,000-unit plan represents an extension of this same division of labor into DeepSeek's own 1GW facility.

The continuation of this split also reflects chip design considerations. The 950DT is equipped with 144GB of Huawei's proprietary HBM standard, "HiZQ 2.0," offering 4TB/s of memory bandwidth and 2TB/s of interconnect bandwidth, with published compute performance of 1 PFLOPS (FP8) and 2 PFLOPS (FP4). Huawei describes the 950DT as designed for "the decode phase of inference and for training," and true to that description, its memory-related specifications are notably strong.

Inference workloads split into two phases: prefill, which processes the entire input text at once, and decode, which generates the response one token at a time. Prefill is dominated by matrix operations, making raw compute performance the key factor. Decode, however, requires reading model weights and the KV cache—which stores context and grows as conversations lengthen—from HBM for every single token generated. This read load tends to outpace the growth in compute demand, meaning that per-token latency is governed less by raw compute speed and more by how many bytes can be moved and at what bandwidth. Larger memory capacity allows a single chip to hold longer context windows or serve more concurrent users' KV caches, while wider bandwidth shortens per-token latency. This is why the economics of inference services hinge more on the 144GB and 4TB/s figures than on raw FLOPS.

Here's how those two figures compare against the NVIDIA hardware DeepSeek continues to use for training, as well as the previous-generation Ascend chip.

Chip HBM Capacity Memory Bandwidth Bandwidth vs. 950DT Source
Huawei Ascend 950DT (planned Q4 2026) 144GB (HiZQ 2.0) 4TB/s 1x (baseline) Huawei official
NVIDIA H200 SXM 141GB (HBM3e) 4.8TB/s 950DT is ~83% NVIDIA official
Huawei Ascend 910C ~128GB ~3.2TB/s 950DT is ~1.25x Editorial calculation from SemiAnalysis figures

The 910C figures were calculated by the editorial team, since Huawei has not published standalone chip specifications; the numbers derive from SemiAnalysis's April 2025 report on the CloudMatrix 384 system (which packs 384 units of the 910C). Dividing the system's total memory capacity of 49.2TB by 384 yields approximately 128GB per chip. The report also states that total system bandwidth is 2.1x that of NVIDIA's GB200 NVL72 (576TB/s), which works out to approximately 3.15TB/s per chip (576 × 2.1 ÷ 384), rounded to 3.2TB/s. The bandwidth ratios are 4.0÷4.8 (≈83%) and 4.0÷3.2 (≈1.25x). This comparison excludes compute performance, interconnect, and software considerations.

The table points to a clear conclusion: on memory specifications alone, the 950DT falls into roughly the same tier as the H200—the chip the U.S. permits for export to China under case-by-case review—while offering a 25% bandwidth improvement over the previous generation. Training requires massive distributed compute, networking, and software capable of running uninterrupted for weeks at a time—precisely the area where the R2 attempt failed. Inference's decode phase, by contrast, is a use case that sidesteps that weakness while leveraging the chip's strengths. That said, Bloomberg's report does not explicitly link the inference-only decision to these specifications; this connection is the editorial team's interpretation, combining the R2 failure reporting with Huawei's published specs. The 950DT's specifications remain pre-launch figures, and there is no guarantee that the bandwidth ratio translates directly into an equivalent inference throughput ratio.

Annual Production of "200,000 to 300,000 Units": Component Supply, Not Compute, Is the Bottleneck

According to Bloomberg, Huawei's 2026 production of the 950DT will be capped at "roughly 200,000 to 300,000 units" due to shortages of components including advanced memory, and because this supply must be split among multiple customers, full delivery to DeepSeek could take more than a year. This production constraint explains why the 160,000-unit figure lands at only about 30% of Huawei's published configuration. It also lends credibility to the report that DeepSeek has been lobbying Beijing to increase its Huawei allocation—if the annual production ceiling sits in the same order of magnitude as DeepSeek's planned order, and that capacity must be shared with other customers, then delivery within a single year becomes mathematically difficult.

Compute chip production overall is expanding. Bloomberg reported in September 2025 that Huawei plans to supply roughly 600,000 units of the 910C in 2026 (roughly double its 2025 volume) and up to 1.6 million Ascend-series dies overall. SemiAnalysis, in a September 8, 2025 estimate, put Ascend shipments at 507,000 units in 2024 and 805,000 units in 2025 (including 653,000 units of the 910C), and estimated that advanced-node capacity at SMIC (Semiconductor Manufacturing International Corporation), the Chinese contract chipmaker responsible for production, would reach 45,000 wafers per month by the end of 2025 and 60,000 wafers per month in 2026. The 950DT is reportedly manufactured using SMIC's N+3 process, and Chen Lin, Huawei Vice President and President of Huawei Cloud's China region, stated in June that the 950DT's rollout to Huawei Cloud would be moved up from the originally planned Q4 2026 to August. It remains unconfirmed whether the chip actually became available in August as promised.

SemiAnalysis identifies HBM procurement as the true bottleneck constraining overall Ascend production. By the firm's estimate, Samsung alone supplies China with 11.4 million HBM stacks, and total supply to China—including other suppliers—reaches 13 million stacks (equivalent to roughly 1.6 million 910C-class chips). China's own memory giant, CXMT, has an estimated 2026 HBM production capacity of around 2 million stacks—enough for only 250,000 to 300,000 910C-equivalent chips. Should the supply of Samsung-manufactured HBM run out, CXMT's output would become the hard ceiling.

CXMT began small-scale production of HBM3E in late August, and while Alibaba's T-Head and Cambricon are reportedly evaluating the chips, commercial deployment in production processors isn't expected until 2027. The Information assesses that CXMT's HBM technology lags three to five years behind industry leaders SK hynix, Samsung, and Micron. While the 950DT's HiZQ 2.0 is described as a Huawei-proprietary HBM specification, assembling 144GB units across 160,000 chips will still require sourcing advanced memory somewhere within this supply chain.

In other words, 160,000 units looks less like a figure reflecting what DeepSeek wants or what Huawei can engineer, and more like the number that results when Huawei allocates the bulk of its 2026 HBM supply to a single customer. Compute capacity can scale with SMIC's monthly wafer output of 60,000. Memory supply cannot scale nearly as easily.

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One Year After the Failed R2 Training Run: Locking In the Division of Labor at 1GW Scale

The September 4 report sits at the intersection of three parallel storylines that have converged over roughly the same timeframe: DeepSeek's hardware choices, Huawei's product supply constraints, and U.S.-China policy dynamics. This plan carries roughly a year's worth of preceding developments. The table below lays out these three threads in chronological order; reporting behind paywalls has been cross-checked against multiple republications.

Date Event Category
August 14, 2025 FT reports DeepSeek's failed attempt to train R2 on Ascend, and the resulting division of labor (training on NVIDIA, inference on Ascend) DeepSeek
September 18, 2025 Huawei Connect 2025 unveils the Ascend 950DT (Q4 2026), the Atlas 950 SuperPoD (8,192 units), and the SuperCluster (520,000+ units) Huawei
November 5, 2025 Reuters reports mandate requiring domestic AI chips at new state-funded data centers Policy (China)
January 15, 2026 U.S. BIS final rule takes effect (announced Jan. 13), shifting China-bound exports of chips like the H200 from "presumption of denial" to conditional case-by-case review Policy (U.S.)
March 26, 2026 Shenzhen brings online a 10,000-card cluster built on the Ascend 910C Huawei
April 7, 2026 TrendForce reports plans to run DeepSeek V4 inference on the Ascend 950PR (training remains on NVIDIA) DeepSeek
April 2026 DeepSeek posts job listings for data center operations and delivery roles in Ulanqab DeepSeek
June 8, 2026 Huawei Cloud announces plan to bring the 950DT online in August (originally slated for Q4 2026) Huawei
June 2026 DeepSeek raises 50 billion yuan in its first-ever outside funding round DeepSeek
July 30, 2026 Bloomberg reports DeepSeek's roughly 1GW data center plan in Ulanqab (partial operation targeted for late 2027 to early 2028) DeepSeek
August 26, 2026 NVIDIA earnings reveal China-bound H200 shipments made up less than 1% of data center revenue, with next quarter's China compute revenue guidance set at zero Policy (U.S.-China)
September 4, 2026 Bloomberg reports DeepSeek's plan to deploy more than 160,000 Ascend 950DT units DeepSeek

What this timeline reveals is that DeepSeek's use of Ascend chips has consistently followed the "training on NVIDIA, inference on Ascend" pattern since August 2025, and that the 950DT's planned commercial launch (Q4 2026) lines up coherently with the data center's projected partial operation (late 2027 to early 2028). The reported delivery timeline of "more than a year" also fits comfortably between these two dates. The April job postings and June funding round are only confirmed to the month, and the August Huawei Cloud rollout remains, as of this writing, an announced plan rather than a confirmed fact.

Policy developments, meanwhile, determine whether DeepSeek can even purchase NVIDIA hardware in the first place. On January 13, 2026, the U.S. Department of Commerce's Bureau of Industry and Security (BIS) published a final rule shifting export review for China-bound chips like the NVIDIA H200 and AMD MI325X from a "presumption of denial" to conditional case-by-case review; the rule took effect the following day. On January 14, President Trump signed a proclamation imposing a 25% tariff on chips in the same performance tier. On June 1, the scope of these restrictions was clarified to extend to overseas subsidiaries of companies headquartered or otherwise affiliated with China. While the U.S. side has cracked open a door, China's side remains shut. China's Cyberspace Administration (CAC) reportedly instructed major tech companies in September 2025 to refrain from purchasing NVIDIA chips, and in November of that year, Reuters reported new guidelines mandating domestic AI chips at state-funded data centers, including a requirement to remove foreign-made chips from under-construction projects that were less than 30% complete.

The consequences showed up clearly in NVIDIA's earnings. On August 26, NVIDIA reported that initial H200 shipments to China accounted for less than 1% of its $89 billion in data center revenue for the quarter ending July 26, and that its guidance of $108 billion for the current quarter assumed zero data center compute revenue from China. Even where export licenses exist, Beijing's opposition has prevented actual sales from materializing. CEO Jensen Huang, discussing growth projections excluding China, remarked, "The unconstrained growth would be a lot higher" (August 26, 2026 earnings call).

DeepSeek's plan represents an extension of this policy vacuum being filled by domestic chips. Notably, Bloomberg's reporting does not address how DeepSeek continues to secure the NVIDIA GPUs it uses for training.

Power Costs in Ulanqab and Implications for Japan's Semiconductor Supply Chain

According to reports from Sina and Yiou, Ulanqab hosted 89 data center projects as of June 2026, representing over 500 billion yuan in total investment and roughly 12.5GW of power capacity when including planned projects. Inner Mongolia's appeal lies in its power and cooling conditions: industrial electricity rates run around 0.35 yuan/kWh, roughly half the 0.7 yuan rate found in major cities (some sources cite an even lower 0.25 to 0.3 yuan). The average annual temperature is 4.3°C, allowing free-air cooling for nearly 10 months out of the year. The region also connects directly to Beijing via fiber optic cable, with latency of roughly 4.2ms.

Huawei, Alibaba, Apple, Kuaishou, Baidu, and ByteDance have already established facilities in the region, and DeepSeek is joining that lineup. Running 160,000 units of the 950DT will make electricity a major fixed cost, and choosing a location with half the standard rate has direct implications for the cost structure of inference services.

For Japanese readers, the connection begins with sheer scale. The 50 billion yuan DeepSeek raised in June converts to roughly ¥1.1 trillion by Kyodo News's exchange rate, and the 1GW facility along with its 160,000 chips represent part of how that capital will be deployed.

The HBM supply chain is also relevant to Japan. Advanced HBM mass production remains limited to just three companies—SK hynix, Samsung, and Micron—and Japanese semiconductor materials and equipment makers maintain significant presence through their involvement in these three companies' HBM production processes. Whether Huawei's proprietary HiZQ 2.0, or CXMT's HBM3E (reportedly three to five years behind industry leaders), can scale to meet demand within China ties directly into a broader question: will a second viable supply chain for advanced memory emerge outside these three companies? If it does, the reach of U.S. export controls will narrow. If it doesn't, the more-than-a-year delivery timeline for 160,000 chips will likely stretch further still.

Whether this plan becomes reality hinges on a series of dates lining up. Will the 950DT launch on schedule in Q4 2026? Will its rollout to Huawei Cloud be confirmed as actually happening? Will Huawei's annual production stay capped at "roughly 200,000 to 300,000 units"? And will the Ulanqab facility begin partial operation between late 2027 and early 2028 as planned? If all four conditions hold, DeepSeek will end up with a system that keeps training on NVIDIA while running inference on domestic chips and cheap electricity, at 1GW scale. If they don't, then the thesis underlying this report—that the true constraint is component supply, not compute capacity—will manifest simply as delay.