Taiwan's National Tsing Hua University (NTHU) has ordered a second-generation multi-column electron beam lithography system, the "MBX," from US-based Multibeam. The system is scheduled to ship in 2027 and will be used at a new facility within the university's semiconductor research institute for academic research and joint development with Taiwanese semiconductor manufacturers. The goal is not to replace EUV systems used for exposing transistor layers in leading-edge logic chips. Rather, it is to bring the capability of drawing wiring patterns directly from design data—without creating masks—into advanced packaging and diverse prototyping applications.
From a 200mm System in 2024 to Taiwan's Second-Generation MBX
This marks Multibeam's first order for a system in Taiwan. According to the announcement, NTHU selected the MBX after an evaluation process and plans to use it for research into both chip-first and chip-last processes, as well as large-format interposers. The university will explore manufacturing methods that directly draw high-density inter-chip wiring and integrate dies with different functions into a single package. The names of the Taiwanese companies participating in the joint development and the terms of the agreements have not been disclosed.
This order also marks a milestone spanning product generations for Multibeam. The company's first mass-production-oriented MEBL system was delivered to US-based SkyWater Technology's 200mm fab in Minnesota in July 2024. SkyWater cited applications ranging from early-stage prototyping to quick-turn production, and had planned to open the system up to customer designs starting in the fourth quarter of 2024. In September 2025, Multibeam announced that development of its next-generation 300mm system was progressing. The company now markets the MBX-300 as its second generation, though the detailed configuration of the system destined for NTHU has not been disclosed.
NTHU's semiconductor research institute, the recipient of the system, received approval for its establishment plan from Taiwan's Ministry of Education in 2021. Its founding director is Burn J. Lin, who led the development of immersion lithography at TSMC. At its founding, companies including TSMC, Micron, and Tokyo Electron pledged a combined annual contribution of over NT$130 million, with plans to accept approximately 80 master's students and 20 doctoral students each year. Rather than serving as a classroom training tool, the MBX is being introduced as equipment for the university to test processes and connect that work to joint development with industry partners.
Breaking Down the Weakness of Single-Beam Drawing Through Parallel Operation of Multiple Columns
Electron beam lithography exposes resist using a fine electron beam. It requires no photomask, and if the design is changed, a different pattern can be drawn on the very next wafer. However, conventional single-beam systems are slow because they must scan a wide area sequentially. Academic literature has consistently pointed to throughput as the central reason direct-write EBL has not spread into mass production.
The MBX arranges multiple small electron beam columns side by side, operating each independently in parallel. According to Multibeam, the system processes design data in formats such as GDSII, OASIS, and MULTIGON internally and rapidly distributes it to each column. Rather than concentrating high current into a single beam, the approach moves multiple write points simultaneously, aiming to achieve both electron beam precision and high overall throughput.
The company's main published specifications for its current product are as follows. These are all manufacturer-stated values that depend on system configuration and exposure conditions.
| Item | Published Specification | Interpretation |
|---|---|---|
| Supported substrates | 150/200/300mm wafers, 310mm panels | Configuration can be chosen to cover everything from small research-scale diameters to standard mass-production diameters and panels |
| Minimum feature size | 30nm isolated, 50nm dense | This refers to the system's drawing dimensions, not a semiconductor process node |
| Typical throughput | 1–2 wafers per hour per writing chamber | Varies depending on pattern density and other factors |
| Accelerating voltage | 5kV | The company states this offers advantages in speed and reduced substrate damage |
| Depth of focus | 10µm | Makes it easier to handle substrates with unevenness or warping |
| Supported topography | Over 100µm | Intended for use with reconstituted wafers and similar substrates |
Another published figure, 25 wafers per hour, is an upper limit specific to Secure Chip ID applications that write small unique identifiers—not a general figure for full-area patterning. Similarly, the claim of "reaching the first pattern over 100 times faster than optical lithography" compares the time to begin development by eliminating mask fabrication. It does not mean wafer exposure speed is 100 times faster than optical systems.
In Advanced Packaging, Correctable Wiring Outperforms Fixed Masks
In advanced packaging, after multiple chips are placed, a redistribution layer is formed on top to connect the chips to one another. However, dies shift from their designed positions during mounting and resin encapsulation processes, and reconstituted wafers themselves warp. When the same wiring pattern is transferred across the entire area using a fixed mask, some chips may end up with wiring that does not align with their actual electrode positions.
With direct-write lithography, wiring data can be adjusted to match measured chip positions. Multibeam lists as product features the ability to adjust patterns to compensate for inter-chip offsets and defects on interposers, and to draw different patterns for each chip location on a wafer. For the chip-first and chip-last processes NTHU plans to study, multiple correction approaches can be compared on the same wafer before committing to remaking a fixed mask.
Large-format interposers are also well-suited to this approach. With optical lithography, the area that can be transferred in a single exposure is constrained by reticle size, requiring wide circuits to be stitched together from multiple exposure fields. The MBX can use the entire wafer surface as its drawing area and can handle curved and radial patterns in addition to straight lines. When the goal is to connect chips with short, high-density wiring, removing the constraints of a mask's fixed pattern and exposure field size becomes valuable.
However, design flexibility does not guarantee manufacturability. Chip positions must first be measured and correction data generated. Then resist exposure, development, and inspection must all be stabilized as a single integrated process. Even with fine drawing dimensions, if defect density or overlay error is large, yield for high-density wiring will not improve. Verifying this process integration is precisely what the university and companies need to confirm together.
What Must Be Measured to Turn an Order into a Production Track Record
As of July 2026, the MBX destined for NTHU remains at the order stage. Price, number of columns, and number of writing chambers have not been disclosed. The resist to be used and the joint development partners also remain unknown. Specifications such as the 30nm isolated pattern feature size and the 1–2 wafers per hour throughput are not measured values achieved in NTHU's advanced packaging processes.
The earlier first-generation mass-production system for SkyWater was installed at a 200mm fab in 2024. NTHU, by contrast, plans to place its second-generation system at a research facility, serving as an evaluation site before processes are transferred to Taiwanese manufacturers. Demonstrations of prototyping speed alone will not be sufficient. Beyond stability during extended operation, overlay accuracy and defect density after chip position correction must be measured. Throughput using actual resist materials and per-layer cost including mask expenses will also factor into mass-production decisions.
If, after shipment and acceptance testing in 2027, the same system can be used to reproducibly form corrected wiring across the full cycle from prototyping to joint development, the MBX will gain a foothold to advance from a university research tool into Taiwan's advanced packaging processes. Conversely, if evaluation results and process transfer to companies are not demonstrated, this announcement will remain merely a commercial milestone—Taiwan's first order. The value of the system will ultimately be determined not by minimum line width, but by the time from design change to a verified wafer, and by how many times that process can be repeated with consistent quality.