"Smaller should be easier" seems like a reasonable intuition. As components get closer together, design and mass production would seem to get simpler.

Yet in NTT's roadmap, optical connections between GPU boards are headed toward commercialization in fiscal 2026, while connections between semiconductor packages are still in the prototype stage, and die-to-die connections inside those packages aren't expected until around 2032. The shorter the distance, the further out the timeline gets. Looking into why reveals that the precision required to build these components changes entirely depending on just how small the target becomes.

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ASICs used in AI data center switches consume over 500W each. According to a technical explainer in the NTT Technical Journal, 30% of that goes to the I/O circuits that transmit high-speed electrical signals. The faster and farther a signal travels, the more electricity leaks away as heat along the wire. This is an unavoidable physical property of electrical wiring itself, no amount of clever chip design can eliminate it.

As a way past this wall, NTT announced its optical-electrical convergence switch "PEC-2" on October 6, 2025, combined with Broadcom ASICs and a chassis from Taiwan's Accton. The switch has a total transmission capacity of 102.4Tbps and houses 16 PEC-2 devices. Traditionally, pluggable optical transceivers sat at the front of the switch, connected to internal chips via electrical wiring. PEC-2 replaces that entire electrical connection with a new type of optical device fixed right next to the chip. This implementation approach is called Co-Packaged Optics (CPO).

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The effect shows up clearly in the numbers. According to the NTT Technical Journal, compared to eight conventional pluggable transceivers at 12W each (96W total), PEC-2 achieves a 50% reduction, running at just 48W. NTT plans to provide commercial samples of PEC-2 within fiscal 2026, and at Expo 2025 Osaka, Kansai, a prototype ran for six months distributing video data to GPUs for AI video analysis.

PEC-2 can make the fiscal 2026 deadline because its target is still on the circuit board, connections between components larger than a millimeter. The stages that follow, PEC-3 and PEC-4, shrink the target further into the interior of ever-smaller components. How small the target gets is what determines the pace of each subsequent stage.

Why can't package-to-package connections go optical until 2028?

PEC-3 targets connections even smaller than PEC-2's. These are the links between semiconductor packages, such as CPUs and GPUs, which NTT calls "optical I/O." According to a technical explainer from EE Times Japan, commercial samples are slated to begin in 2028, with practical deployment expected around 2030, several years behind PEC-2's fiscal 2026 commercialization target.

The reason lies in the sheer difference in component size between what PEC-2 and PEC-3 target. While PEC-2 makes connections between components mounted on a circuit board optical, the optical chiplet that PEC-3 aims for integrates, according to the NTT Technical Journal, 16 thin-film optical devices called "membrane devices" onto a substrate just 1.11mm by 2.75mm, roughly the size of a fingernail. According to the EE Times Japan explainer, this optical chiplet is designed to directly connect CPU and GPU semiconductor packages to each other.

What makes membrane devices hard to miniaturize is that silicon alone can't efficiently produce lasers or optical modulators. This requires bonding thin films of indium phosphide-based compound semiconductors, which excel at emitting light, directly onto a silicon substrate. The process of bonding two materials with different properties into a thin layer without damaging either demands a completely different level of integration precision than developing board-level components like PEC-2.

Even though both are described with the same term, "optical interconnect," PEC-2 deals with components sitting on a circuit board, while PEC-3 deals with the gap between semiconductor packages small enough to fit on a fingernail. At this scale, an entirely new thin-film device combining different materials must be built from scratch, accounting for the years needed to reach initial samples in 2028 and practical deployment around 2030.

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2032: Reaching Die-to-Die Connections

Beyond PEC-3 lies the connection between dies. Inside a semiconductor package sit multiple dies, the actual elements etched with computing circuitry, arranged side by side. Realizing "PEC-4," which would make the wiring inside that package optical, is expected around 2032. NTT researchers have set a goal for this stage of cutting overall computer power consumption to one-hundredth of current levels.

While PEC-3 was about connecting package to package using a component called an optical chiplet, PEC-4 is about making the wiring inside that package, between die and die, optical. Each time the target shrinks from millimeter scale to micron scale, the required integration precision ratchets up another notch.

Beyond this technical difficulty, data center operators' investment sequencing also reinforces the staged rollout. Operators naturally start investing in the easier-to-adopt board-to-board upgrades first, since it's more realistic to time package-to-package and die-to-die overhauls to align with later equipment refresh cycles. The technical challenge of building the components themselves is the primary driver, with customer investment sequencing as a secondary factor, and together they shape how these years are allocated across the roadmap.

In Japan, IDC forecasts domestic AI infrastructure investment will reach 821 billion yen in 2026, up more than 18% year-over-year, and data center power costs are directly tied to the cost of AI adoption for Japanese companies. Whether PEC-3's commercial samples ship on schedule in 2028 will reveal how far the technology for rebuilding the components themselves has actually progressed. The next time you glance at the circuit board inside a laptop or server, it may be worth remembering that somewhere inside, an optical device rebuilt down to the size of a fingernail could be doing the work.