There are indications that Intel Foundry could handle wafer manufacturing for multiple tiles and advanced packaging for NVIDIA's next-generation AI platform "Feynman." Wccftech reported on July 24, 2026 that discussions between the two companies were progressing. In its earnings call the day before, Intel revealed that its EMIB-T backlog was growing and that it was preparing for customer mass production in 2027. The technology and timing overlap. However, neither Intel nor NVIDIA has announced a manufacturing contract for Feynman, and no customer name appears in the earnings materials. What can be confirmed at this point is only that Intel is building up the facilities and technology capable of taking on a large-scale contract.
A Deal Reportedly Extending to Wafer Manufacturing
According to Wccftech, the deal under consideration includes both wafer supply and advanced packaging, and Intel's role reportedly is not limited to a single tile. The report also mentions a concept combining EMIB-T, which connects dies laterally, with Foveros Direct 3D, which stacks them vertically. It envisions a division of labor in which Intel manufactures part of Feynman and then integrates multiple completed dies using its own technology.
Wafer manufacturing and packaging are separate processes. The former forms circuits on silicon to create dies, while the latter connects compute chips with memory and other components to assemble them into a single system. Since NVIDIA can use different suppliers for each process, the extent of Intel's role cannot be determined from a single statement. The reason this report paints a broad picture of Intel's scope is that it includes wafer manufacturing in addition to package assembly.
At the same time, the report attributes its information only to "recent observations" and does not disclose contract value or wafer volume. It's also unclear which tile will be made with which manufacturing process, which fab will be used, or how orders would be split with other companies. The report does not state that a contract has been finalized, and the announcement timing of 2027 or 2028 is merely a projection. This report should be read as conveying progress in negotiations, not as an announcement that a manufacturing contract has been decided.
EMIB-T Heading Toward Customer Mass Production in 2027
In its Q2 2026 earnings call on July 23, Intel explained that customer interest in EMIB-T was very high and that its backlog was growing. Yield and reliability have reached internal targets, and the company is scaling up production capacity to support customer mass production in 2027. While it kept the customer name undisclosed, the timeline for moving advanced AI packaging into mass production is becoming concrete.
EMIB-T is an expanded version of EMIB, which connects dies laterally using small silicon bridges embedded in the package substrate. Intel unveiled it in 2025 as a technology aimed at future generations of High Bandwidth Memory (HBM). Foveros Direct 3D uses hybrid bonding to connect dies vertically, shrinking the connection pitch to under 5 micrometers.
Intel's official roadmap includes a configuration that integrates a 14A upper die with an 18A-PT lower die using both Foveros Direct 3D and conventional EMIB. EMIB-T was presented in the same announcement as a separate option for future HBM demand. While this confirms that Intel can offer both 2.5D connections and 3D stacking, it has not stated that EMIB-T will be used in the 14A and 18A-PT configuration.
At GTC 2026 in March, NVIDIA unveiled the new GPU of the Feynman generation, the LP40 LPU, and the Rosa CPU. On the networking side, it placed BlueField-5 and CX10, and Kyber uses both copper interconnects and co-packaged optics. However, this is merely an explanation of the overall system that makes up Feynman. It does not indicate which components will be housed in the same package or which connection technology will be used.
The manufacturing technology timeline is also close. Intel has completed PDK 0.5 for 14A and will introduce PDK 0.9 in October 2026. It plans risk production for its own products in the second half of 2027, with mass production ramp-up in 2028. However, NVIDIA has not disclosed the manufacturer or process for Feynman. It has also not revealed the packaging method or mass production timing. Even if the technologies are compatible and the schedules overlap, that is not proof of adoption.
The increase in capital expenditure should be treated the same way. Intel is raising its overall 2026 capital expenditure to over $20 billion, with a further significant increase planned for 2027. CFO Dave Zinsner stated during the Q&A session of the earnings call that the investment includes EMIB-T, and that for areas where the company has secured long-term contracts, it can forecast demand several years ahead. However, capital expenditure also goes toward front-end fabs, cleanrooms, substrates, and memory. There is no disclosed material linking NVIDIA's orders to this increase.
No Data Center GPU Manufacturing in the Announced Collaboration
Intel and NVIDIA are already collaborating on both capital and product fronts. On September 18, 2025, the two companies announced that Intel would develop x86 CPUs for NVIDIA's data centers and supply x86 SoCs incorporating NVIDIA RTX GPU chiplets for PCs. NVIDIA agreed to invest $5 billion in Intel stock, acquiring shares at $23.28 each.
This agreement indicates that the two companies have entered a relationship of jointly developing products across multiple generations, but data center GPU manufacturing outsourcing is not written into its scope. What Intel makes are x86 CPUs to NVIDIA's specifications and PC SoCs that Intel itself brings to market. If the outsourcing scope truly expands to include Feynman's GPU tiles and packaging as reported, it would represent a step beyond the existing collaboration.
NVIDIA's Feynman announcement also contains no manufacturing information. What the company has disclosed is only the architecture positioned after Vera Rubin and the major chips that make up the system, such as the Rosa CPU. Since the manufacturer and process have not been disclosed, the view that Intel 14A will be used for Feynman remains speculation based on the reporting. Intel, too, did not name any external customers for 14A or any company placing orders for EMIB-T in its earnings call.
A $1.5 Billion Advanced Packaging Contract with Amkor
The party with which NVIDIA announced a formal contract on July 23 was not Intel, but Amkor Technology. The two companies signed a multi-year contract worth $1.5 billion to expand advanced packaging capacity in the United States. NVIDIA will make an upfront payment, and the two will jointly develop high-density interconnects and next-generation heterogeneous chip integration. The target is described as next-generation AI and accelerated computing platforms, without disclosing specific product names.
The Amkor contract shows that NVIDIA has begun securing packaging capacity needed for future products through long-term contracts and upfront payments. This move resembles the "long-term contracts" mentioned in Intel's earnings call. However, the Amkor announcement contains no exclusivity clause, and Feynman is not named. It cannot be concluded that NVIDIA placing orders with Amkor means it won't use Intel, nor that the two companies will split the same product between them.
In AI accelerator production, after securing advanced wafers and HBM, chips are mounted on substrates and subjected to 2.5D interconnection or 3D stacking. Preparing each process takes a long time. Having multiple supply channels is more advantageous for ramping up production and handling disruptions than securing capacity for all processes with a single company. Given that the report on Intel's adoption emerged the day after NVIDIA announced its Amkor contract, one could also interpret this as NVIDIA diversifying its procurement for the Feynman generation. However, that conclusion can only be confirmed once Intel and NVIDIA disclose the specific tiles, manufacturing technologies, and production timelines involved.
