At the OCP Global Summit, held in San Jose from October 12, 2026, NVIDIA revealed the configuration of the "Vera Rubin Ultra NVL576 CPO," a system that uses optical connections to link 576 GPUs. Slides from a talk by Ian Buck showed a CPO switch tray supporting NVLink 7, the high-speed GPU-to-GPU interconnect, and indicated that the design targets AI models with more than 10 trillion parameters, with an emphasis on performance per watt.
The idea of combining 576 GPUs into a single NVLink domain had already been disclosed in a technical article NVIDIA published in March. What this announcement made concrete is the optical interconnect hardware that links GPUs spread across multiple racks at high speed. The configuration treats 576 GPUs distributed across eight racks as one large pool of compute, but the number of GPUs that can be connected and the performance actually delivered on AI workloads need to be evaluated separately.
An NVLink configuration that consolidates 576 GPUs into 8 racks
According to the technical article NVIDIA published on March 16, the Vera Rubin Ultra NVL576 combines eight MGX NL racks, each housing 72 Rubin Ultra GPUs. That gives 72 GPUs × 8 racks = 576 GPUs, and the plan uses a two-tier all-to-all topology to bring every GPU into a single NVLink domain. Both copper cabling and direct optical connections are used between GPUs, supporting high-speed data transfer within and across racks.
An NVLink domain refers to the range within which multiple GPUs can exchange data at high speed over NVLink. When a large AI model is split across many GPUs, performance depends not only on the compute power of each GPU but also on how efficiently data can move between them. NVL576 extends the range of tightly coupled operation from a single rack to multiple racks, so that 576 GPUs can be used as one unit.
Page 18 of the OCP presentation shows the "NVLink 7 CPO Switch Tray" alongside the Rubin Ultra compute tray. CPO (Co-Packaged Optics) is a technology that places the optical engines that convert between electrical and optical signals in the same package as a semiconductor chip such as a switch. Because it allows electrical traces to be shorter than in conventional designs, it is attracting attention as a way to ease the power consumption and signal-transmission limits that come with high-speed communication. For NVL576, the concept is to use this technology to connect GPUs spanning multiple racks. However, the 576 GPUs are not physically integrated into a single chip; this is a mechanism that links independent GPUs over a high-speed network.
It is also important to distinguish the prototype system "Polyphe," which NVIDIA introduced in its March article, from the production NVL576 based on Rubin Ultra. NVIDIA described Polyphe as a working multi-rack NVL576 prototype using GB200. In other words, the existence of a prototype for validating a 576-GPU configuration does not mean a production Rubin Ultra system is complete. Likewise, "Kyber NVL144," which places 144 GPUs in a single rack, is a separate rack design, and NVL576 is not a product that puts 576 GPUs in one rack. The figure of 576 refers to the total number of GPUs across eight racks.
How does 576-GPU NVLink differ from Ethernet connecting up to 512K GPUs?
The OCP presentation contains several numbers describing GPU connectivity at scale. The "576" in NVL576 is the number of GPUs belonging to a single NVLink domain, whereas "512K" refers to the scale of an entire AI factory connected over an Ethernet network. "10T+" is the parameter count of the AI models NVL576 targets, not a number of installed or connected GPUs. All of these relate to scaling up systems, but each measures something different.
In the same talk, NVIDIA also introduced a large-scale network configuration using "Spectrum-X Photonics Multiplane Ethernet." This is a scale-out network that links a wider range of computing facilities over Ethernet. NVL576, by contrast, is a scale-up configuration that uses NVLink to couple GPUs tightly. Both use optical communication technology, but they play different roles in the network and cover different ranges of connectivity.
The main figures shown in the presentation are summarized below.
| Figure in the presentation | Technology / system | Scale it indicates | Presentation page |
|---|---|---|---|
| 576 GPUs | Vera Rubin Ultra NVL576 CPO | Number of GPUs connected in a single NVLink domain | 18 |
| Up to 512K GPUs | Spectrum-X Photonics Multiplane Ethernet | GPU scale of an AI factory connected via a flat two-tier network | 14 |
| 10T+ | AI models envisioned for Vera Rubin Ultra NVL576 | Model parameter count exceeding 10 trillion | 18 |
These figures summarize the configurations and expansion scales NVIDIA presented in its OCP 2026 slides; they are not performance measurements from running AI models under identical conditions. The 512K figure also follows the presentation's notation, and the ratio to 576 cannot be calculated and treated as a difference in processing speed.
CPO and NVLink are also different concepts. NVLink is the technology that connects GPUs at high speed, while CPO is an implementation method that determines where the optical engines needed for communication are placed. What stands out in this announcement is that a switch tray using CPO was shown as the device for expanding the scale of NVLink connectivity across multiple racks. Interpreting the total number of GPUs that can be connected over Ethernet as the number of GPUs in a single NVLink domain would misread the roles each network plays.
Power efficiency in focus for models beyond 10 trillion parameters
In its slide introducing NVL576, NVIDIA explains that the design targets AI models with more than 10 trillion parameters and emphasizes performance per watt. Running a large model distributed across many GPUs requires not only strong compute from each GPU but also efficient transfer of the data exchanged between them. High-speed connections using CPO aim to improve the efficiency of this communication. However, the "10T+" in the presentation indicates the scale of the models envisioned; it is not a measurement showing that a model of that size has been run at a given speed.
The slides introducing NVL576 also do not include the system's total power consumption or results of performance comparisons under matched conditions. Evaluating performance per watt requires fixing the AI model, numerical precision, and workload, and clarifying how much of the system's power draw is counted. Results change depending on whether one measures the power of the GPU alone or of the entire system, including NVLink switches. Moreover, the metrics for judging performance differ between comparing model training time and comparing inference response speed or output volume.
Page 14 of the presentation also shows a figure of "5x power efficiency" for Spectrum-X. But this concerns the Ethernet product and does not mean that CPO connectivity in NVL576 makes power efficiency five times better. The page alone also does not make the basis of comparison for this figure sufficiently clear. It is therefore not appropriate to treat the Spectrum-X figure as a performance improvement rate for Rubin Ultra or NVL576 as a whole.
If as many as 576 GPUs can be combined in a single NVLink domain, there is more flexibility in how a huge AI model can be distributed across multiple GPUs. At the same time, actual processing speed varies with the amount of data transferred between GPUs and with how the model's processing is partitioned. Increasing the number of GPUs does not necessarily raise processing speed by the same factor. What NVL576 shows is a configuration for tightly coupling a larger pool of compute than before, and the actual performance gains will need to be verified against individual AI workloads.
Toward 2027 availability, manufacturing and maintenance are challenges
At this OCP Global Summit, NVIDIA also announced that it has contributed the Vera Rubin rack and compute tray designs through the MGX architecture. MGX 1.2 adopts a design that standardizes liquid-cooling systems and power and cooling interfaces, simplifying assembly during manufacturing and maintenance after deployment. NVL576, which uses optical connections spanning multiple racks, will also be operated in combination with this physical foundation of power, cooling, and rack structure. For large-scale AI systems, operability across manufacturing, deployment, and maintenance matters as much as GPU compute performance and communication bandwidth.
However, it is too early to conclude that every optical-component implementation for the production product has been settled just because a CPO switch tray was shown at OCP. According to FUNDA's October 21 report, which covered the talk and optical-interconnect sessions on site, Ian Buck hinted at an arrival in 2027, while NVIDIA still has room to consider NPO (Near-Packaged Optics). NPO places the optical engines not in the same package as the semiconductor chip but on the substrate near it. The report does not view the presentation of this CPO configuration as the final production specification being fixed.
That said, this does not mean the CPO configuration for NVL576 has been withdrawn. The basic policy of linking multiple racks with high-speed optical connections and the technical choice of where to implement the optical engines for mass production should be considered separately. The 2027 timing is also an outlook as of the talk, and no specific release date or shipment volume has been guaranteed.
When it comes to evaluating the actual product, in addition to performance measurements under matched conditions such as model and numerical precision, the serviceability of the optical connections will be an important factor. In particular, what replacement work is needed if an optical engine or related component fails, and how much of the system must be shut down in that case, will affect the operating efficiency of large AI facilities. If the technology for combining 576 GPUs into one NVLink domain is brought to market as a product that can be operated reliably, including manufacturing and maintenance, developers will find it easier to allocate compute to larger AI models beyond the traditional limits of a single rack. Going forward, the focus will be on the specific implementation of the optical connections and the manufacturing setup, as well as how much performance and power efficiency the system achieves on real AI workloads.