Every time the name Rapidus comes up, plenty of people are left puzzled: why is so much taxpayer money going to a company with no mass-production track record? In fact, Rapidus has never run a semiconductor mass-production line, yet it is attempting to reach the same cutting-edge 2-nanometer generation as TSMC, Samsung, and Intel. Against the 7.3 billion yen raised purely through equity from eight private companies, the government's planned total support—combining equity investment and R&D subsidies—comes to 2.9 trillion yen, a gap of 397 times. What underpins this asymmetric bet are three workarounds designed to substitute for the missing foundation of mass-production experience itself: importing technology from IBM and others, adopting a production method different from TSMC's, and pouring in state-scale funding.
8 Companies, 7.3 Billion Yen vs. Government's 2.9 Trillion Yen: The Stakes Piled Onto a Company With Zero Production Experience
At the factory completed in Chitose, Hokkaido, a semiconductor mass-production line has never once been in operation. Rapidus Corporation was established on August 10, 2022, with seven companies—Toyota Motor, Sony Group, NTT, SoftBank, NEC, Denso, and Kioxia—each contributing 1 billion yen, and Mitsubishi UFJ Bank contributing 300 million yen. Total capital came to just 7.3 billion yen. On November 11 of the same year, Japan's Ministry of Economy, Trade and Industry (METI) announced that Rapidus had been selected as the domestic manufacturing base, alongside the establishment of the research organization LSTC (Leading-edge Semiconductor Technology Center). Tetsuro Higashi, former president of Tokyo Electron, serves as chairman, while Atsuyoshi Koike, a former SanDisk executive, serves as president.
Seven of the eight investing companies are firms whose competitiveness directly depends on securing a stable supply of semiconductors. Toyota and Denso have demand for advanced chips in autonomous driving and electrification, while SoftBank and NTT have demand tied to data centers. Sony Group is a leader in image sensors, and Kioxia in memory—both are chip users that joined the lineup in that capacity. Mitsubishi UFJ Bank, a financial institution, joined this formation from the standpoint of supplying capital.
Against this 7.3 billion yen in private investment, the government has laid out a plan to invest a combined 2.9 trillion yen in R&D support and equity by fiscal 2027. A simple comparison shows a gap of several hundred times, but the precise multiple and breakdown become clear only by tracing the flow of investment and R&D support. The figures continue to be updated even now.
What Rapidus is aiming for is mass production at the cutting-edge 2nm generation—the same level TSMC, Samsung, and Intel have built up over decades. The target timeframe is set for the latter half of fiscal 2027. The combination of a company with no mass-production experience suddenly attempting the world's most advanced process represents the single biggest gamble in Japan's semiconductor policy.
Mass production of semiconductors is a fundamentally different matter from completing a single prototype. It refers to the repetitive process of continuously fabricating thousands, even tens of thousands, of chips from the same design, gathering data on defect patterns and equipment-to-equipment variation, and gradually raising the yield. TSMC and Samsung have built up this repetitive process over decades, across millions of wafers.
Rapidus has none of this accumulated experience. Because this repetitive process requires enormous capital investment and long stretches of time, a latecomer cannot realistically catch up by following the same path. That is precisely why the very foundation of mass-production experience needs to be replaced through other means.
From 50.3% to 7% of Global Share: 36 Years Shaped by US-Japan Friction and a Missed Shift to Horizontal Specialization
According to Cabinet Office data, Japan's semiconductor industry peaked in 1988 with a 50.3% share of the global market—an era in which Japanese companies accounted for more than half of all semiconductors made worldwide. METI data puts the 2024 figure at 7%, a decline of 43.3 percentage points from the peak.
The trigger for this decline was friction between the US and Japan. On June 14, 1985, the US Semiconductor Industry Association (SIA) filed a complaint under Section 301 of the Trade Act, citing barriers to entry in the Japanese market. On June 24 of the same month, US-based Micron Technology separately filed a dumping complaint against Japanese-made DRAM with the USTR (Office of the United States Trade Representative). These actions led to the signing of the US-Japan Semiconductor Agreement on September 2, 1986. The agreement required expanding the market share of foreign-made semiconductors in Japan and exporting at fair prices, placing constraints on the expansion strategies of Japanese manufacturers.
Around the same time as the agreement, the very formula for winning in the industry began to shift. While Japanese companies continued to cling to the vertically integrated model of handling everything in-house from design to manufacturing, TSMC—founded in 1987—introduced the horizontally specialized foundry model, taking on manufacturing alone. This allowed design firms to operate without owning factories, while TSMC could spread its fixed costs by aggregating orders from multiple customers into large-volume production. Japan's diversified electronics makers prioritized production capacity for their own in-house products and fell behind in this shift toward specialization.
Elpida Memory, formed in 1999 by merging the DRAM businesses of NEC and Hitachi, symbolized the limits of vertical integration. Backed by the government, it was Japan's sole major DRAM specialist and held the world's third-largest market share, but it filed for corporate reorganization on February 27, 2012. With liabilities of roughly 448 billion yen, it marked the largest manufacturing bankruptcy in Japan's history, and the company was acquired by US-based Micron the following year.
Vertical integration was not a mistake from the outset. In the DRAM market of the 1980s, having a single company handle everything from design to manufacturing and quality control made it easier to stabilize yield and quality, and this became a strength for Japanese manufacturers. The tide turned once semiconductor applications broadened from general-purpose memory to logic-centric chips, and horizontal specialization—better suited to handling diverse designs—began to gain the upper hand in investment efficiency. Japanese companies kept prioritizing their own in-house production capacity at this turning point, ceding the initiative to dedicated foundries like TSMC.
Not Competing on TSMC's Turf: Rebuilding the Production Method Around Single-Wafer Processing
"We can create a different field and market from TSMC," declares Atsuyoshi Koike, president and CEO of Rapidus. With no way to compete on mass-production track record, the company chose to avoid a playing field where it would be measured by the same yardstick, and instead decided to rebuild the production method itself.
That production method is a scheme called RUMS (Rapid and Unified Manufacturing Service). It integrates design, front-end, and back-end processes under a single company in one continuous flow, and collects individual data through a "single-wafer process" that handles wafers one at a time. The collected data is analyzed with AI to control the process and improve yield.
At conventional foundries such as TSMC, the industry standard is to bundle wafers into "lots" of 25 units for transport and management. Single-wafer processing at individual pieces of equipment—such as exposure or film deposition—is not uncommon, but the transport between processes and progress management itself is handled at the lot level. Lot-based management is well suited to the efficiency of mass production, but if an abnormality occurs in a single lot, a loss across all 25 wafers can occur simultaneously.
RUMS, as Rapidus positions it, replaces this transport and management unit itself with a single wafer, placing at the core of its design philosophy a system that individually links and analyzes measurement data wafer by wafer across the entire process. Conventional foundries are also said to be advancing data collection through AI-based equipment and process control, but Rapidus explains that its approach allows faster identification of the process or equipment where an abnormality occurred, making it easier to respond to needs for high-mix, low-volume orders and short delivery times.
Rapidus reportedly aims to cut front-end turnaround time to less than half that of conventional foundries. Even without an accumulated mass-production track record, if the company can win customers through speed from order to delivery, it can avoid the disadvantage of being measured against TSMC on the same terms. This reversal of logic underpins the rebuilding of the playing field through RUMS.
Importing the Missing Experience: Mobilizing Technology From IBM, imec, and ASML
In December 2022, Rapidus signed a strategic partnership with IBM for joint development of 2nm-node technology. Under the agreement, Rapidus engineers are working alongside IBM engineers at IBM's R&D facility, the Albany NanoTech Complex, in New York State, learning the technology together. With no foundation of mass-production experience, the company chose the path of first transplanting technology from a partner with existing expertise.
Even IBM, the party teaching the technology, does not currently operate its own factory mass-producing 2nm-generation semiconductors. IBM transferred its semiconductor manufacturing business to GlobalFoundries in 2015, and the Albany NanoTech Complex, where Rapidus engineers are absorbing technology, is an R&D facility rather than a mass-production line. What Rapidus is transplanting is not process know-how forged through mass production, but the research-stage technology itself.
Rapidus did not limit its source of technology transfer to IBM alone. On April 4, 2023, it joined the "Core Partner Program" of imec, the Belgian research institute known for its work on extreme ultraviolet (EUV) lithography, gaining access to advanced technology, a 300mm pilot line, and constituent technologies for the 2nm generation. On December 14, 2024, the latest EUV lithography machine from Dutch company ASML, the "TWINSCAN NXE:3800E," arrived at New Chitose Airport, and delivery to the Chitose plant began on the 18th of the same month. This marked the first time a mass-production-grade EUV lithography machine had ever operated domestically in Japan.
EUV lithography equipment is indispensable to the 2nm generation because shrinking circuit line widths down to a few nanometers requires a resolution attainable only with extreme ultraviolet light. ASML is the only company in the world capable of manufacturing this equipment for mass production, and the waiting period for delivery is said to be long. That Rapidus managed to secure delivery as early as the end of 2024 is one example of compensating for its lack of mass-production experience by prioritizing equipment procurement.
This setup produced its first result on July 18, 2025. Just three months after production building IIM-1 in Chitose entered full operation, Rapidus announced the country's first confirmed operation of a 2nm-generation GAA (Gate-All-Around, a structure in which the gate surrounds the entire channel) transistor. While this was a prototype-stage achievement rather than mass production, this structure suppresses leakage current more easily than the conventional FinFET (fin field-effect transistor) structure, but it also increases the number of process steps, making yield optimization the single biggest technical hurdle of the 2nm generation. Because suppressing leakage current allows higher computing performance at the same power draw, the benefit is greater for high-performance chips such as AI accelerators for data centers. Koike stated, "We have cleared a major milestone toward mass production in 2027."
Collaboration with NVIDIA is also being explored on the computing-resource side. According to NVIDIA's Tim Costa, the company's lithography library "cuLitho" speeds up the generation of OPC (Optical Proximity Correction) patterns—essential for transferring circuit patterns onto photomasks—by 70 times over conventional methods using GPU computation, and TSMC has already been using it in mass production since 2024. Another library, "cuDSS," solves linear equations related to physical phenomena at high speed, and in verification with TSMC, Samsung Electronics, and EDA giant Cadence Design Systems, it is said to have boosted the computational speed of finding optimal solutions by 60 to 80 times. Both are track records at existing major foundries such as TSMC, and collaboration between NVIDIA and Rapidus remains at an exploratory stage. For a company with no mass-production experience, being able to leverage such external computing infrastructure in the future could serve as a means of gaining more trial-and-error cycles, compensating for the lack of experience with computational power.
Tracing the 2.9 Trillion Yen: IPA's 250 Billion Yen in Equity and 631.5 Billion Yen in R&D Contracts
Government funds flow into Rapidus mainly through two channels: equity investment by the Information-technology Promotion Agency (IPA), an independent administrative agency, and R&D contracts through METI and NEDO (New Energy and Industrial Technology Development Organization). IPA added 100 billion yen on February 27, 2026, and a further 150 billion yen on June 5, bringing its cumulative equity investment to 250 billion yen.
This investment gives IPA only 11.5% of voting rights, but it holds a "golden share" carrying veto power. A golden share is a type of stock that, regardless of ownership ratio, allows its holder to veto specific resolutions concerning the core of a company's management—a mechanism sometimes adopted when the state is involved in the management of critical infrastructure companies. In Rapidus's case as well, the design allows the government to check shifts in mass-production policy or capital strategy without requiring a majority of voting rights. Even with a small share of votes, it can hold decisive sway at critical junctures, letting the government retain the reins of oversight without deeply intervening in day-to-day management. In the same month of February 2026, 32 private companies also made additional investments totaling 167.6 billion yen, broadening the base of investors from the original eight companies' 7.3 billion yen.
On the contract side, METI, through NEDO's R&D contract program under the Post-5G Fund, decided on April 11, 2026, to provide an additional 631.5 billion yen for fiscal 2026. Combined government support through equity and R&D funding is planned to reach a total of 2.9 trillion yen by fiscal 2027. Compared with the 7.3 billion yen originally pooled by the eight founding companies, this scale amounts to 397 times as much. Behind the government's decision to invest at this scale lies an economic security objective: building a system that does not depend on overseas sources for the supply of advanced semiconductors. Reports also suggest that total investment, including private capital expenditure, is expected to swell from an initially planned scale of 5 trillion yen to around 7 trillion yen.
However, the 2.9 trillion yen figure is merely the planned total through fiscal 2027, and as of June 2026 the amount actually finalized is smaller than this. While reports vary, the amount already decided is generally estimated to be in the range of roughly 2.3 trillion to 2.6 trillion yen. This gap between the plan and the actual figures shows that Rapidus's fundraising is still only halfway complete.
IBM, which receives compensation for its technology transfer, domestic manufacturers able to preferentially supply components and equipment, and the 32 companies that deepened their ties with Rapidus through investment, are the parties standing to gain from this structure. On the other hand, if mass production does not proceed as planned, IPA, as an investor, will end up holding valuation losses, the cost of which will ultimately fall on taxpayers. The parties who stand to benefit and those who bear the risk of loss are thus clearly divided.
Where a Late-2027 Target Stands as TSMC, Samsung, and Intel Race Ahead
TSMC, Samsung, and Intel are all advancing the rollout of 2nm-generation GAA processes between 2025 and 2026. Rapidus is aiming to begin mass production in the latter half of fiscal 2027, several years behind these three companies. On top of the gap in mass-production experience, Rapidus also bears the heavy weight of a time gap.
EE Times Japan reports that METI projects a global supply shortfall of 10% to 30% relative to demand for 2nm-generation logic semiconductors in fiscal 2030. Even if the market itself has room to grow, whether Rapidus can raise the quality of its mass production to match its competitors' level is a separate question. Lucy Chen, vice president at Taiwanese research firm Isaiah Research, commented, "They can manufacture, but there are still doubts about whether they can achieve a level of yield and productivity that generates profit."
Material that could counter this skepticism is beginning to accumulate in the form of customers at the prototype stage. Fujitsu is moving toward commissioning Rapidus to manufacture a 1.4nm-generation NPU (Neural Processing Unit, a computing device specialized for AI processing), with NEDO subsidizing two-thirds of the roughly 58 billion yen development cost. In March 2026, Canon and Synopsys Japan commissioned a prototype of a 2nm-generation image-processing semiconductor, marking the first such commission by a major domestic company. On November 17, 2023, Rapidus also reached an agreement with Canada's Tenstorrent on IP development, advancing joint development of an AI edge semiconductor based on the 2nm generation. Even without a mass-production track record, the high-mix, low-volume characteristic of RUMS—which allows Rapidus to work closely with individual customers at the prototype stage—is drawing in clients.
Lucy Chen's concern also points to the need to separate technical feasibility from business profitability. While single-wafer processing makes it easier to handle individual cases, the number of wafers each piece of equipment can process is lower than with lot processing, meaning that securing the same production volume requires investing that much more in equipment and personnel. A one-point change in yield significantly shifts the number of good chips obtainable from a single wafer, and if mass production continues with low yield, the per-unit manufacturing cost will end up higher than competitors'. The high fixed-cost structure that comes with RUMS's strength in high-mix, low-volume production is also a factor deepening Rapidus's reliance on government funding.
Land Prices in Chitose Rose 44.1% in a Year: The Bet Is Already Reshaping the Local Economy
In the published land price survey by Japan's Ministry of Land, Infrastructure, Transport and Tourism as of January 1, 2026, the area around JR Chitose Station in Chitose City rose 44.1% year-on-year, the highest rate of increase in the entire country. Even the citywide average rose 11.85%, and commercial land alone rose 29.67%, with land prices now roughly triple what they were in 2022. Whether Rapidus's mass production succeeds or fails will not be known until fiscal 2027 or later, but land prices are already moving as if pricing in that outcome in advance.
The reason a semiconductor plant's arrival pushes up land prices is that demand for relocation among related companies and employees arises ahead of the start of mass production itself. The Chitose plant is drawing in suppliers of materials and equipment as well as partner companies handling construction and maintenance, swelling housing demand for employees and their families as well. Hokkaido has put forward the "Hokkaido Valley" vision, positioning the belt stretching from Chitose through Ishikari to Tomakomai as a hub for advanced technology, and related investment is spreading, including SoftBank's announced plan to build a data center powered by renewable energy in Tomakomai.
In November 2023, the Hokkaido Association for New Industry Creation (ANIC) estimated the economic ripple effect on the premise that Rapidus would begin mass production in fiscal 2027, projecting a cumulative total of up to 18.8 trillion yen through fiscal 2036. Even under a scenario in which only the first-phase Chitose plant (IIM-1) is built, the ripple effect across all of Hokkaido is projected to reach a cumulative 10.1 trillion yen over 14 years, boosting the prefecture's total gross domestic product (GDP) by 6.1 trillion yen. The 44.1% rise in land prices is already a realized, measured figure, while the 18.8 trillion yen is an expected value that will only materialize if Rapidus succeeds in mass production. The market, in other words, has priced things in ahead of knowing whether mass production will succeed or fail.
According to a survey published in May 2025 by Frog Inc., a company that aggregates job listing site data, the minimum monthly salary listed in job advertisements within Chitose City rose 46.42% over two years, the highest growth rate in the country. This local sense of exhilaration—with both land prices and wages climbing—stands in contrast to the trajectory of Elpida Memory in the past. Elpida's 2012 bankruptcy is reported to have imposed a burden on the public of roughly 28 billion yen, a past example showing that investment in state-driven semiconductor projects does not always guarantee benefits for local communities or citizens.
The Second Half of Fiscal 2027: Where Zero Mass-Production Experience Faces Its Test
What Rapidus has built up since its founding in August 2022 are three workarounds: external mobilization of technology borrowed from IBM, imec, and ASML; RUMS, a production method different from TSMC's; and 2.9 trillion yen in funding. The bet was that even without mass-production experience itself in hand, combining these three elements could fill the missing foundation. The confirmed operation of a 2nm GAA transistor in July 2025 shows that this bet has cleared its first technical hurdle.
If mass production cannot begin in the latter half of fiscal 2027, then achieving positive operating cash flow in fiscal 2029 will not be feasible, and the subsequent goals of positive free cash flow in fiscal 2031 and a stock listing will also recede further into the distance. In this sense, the roadmap Rapidus has laid out is a single connected line. Conversely, if the company can clear this first hurdle—the start of mass production—the remaining two financial targets move into a stage where they can be verified with concrete numbers: mass-production yield and order volume.
Having weighed the fall from 50.3% in 1988 to 7% in 2024, and the 2012 bankruptcy of Elpida, METI chose not to provide additional support to existing companies, but instead to establish a new one. The reasoning behind founding a new company rather than reinforcing existing players has been explained only in limited terms by those involved, but it can be read as a formation designed not to repeat the past failure of clinging to vertical integration and self-reliance. In that sense, Rapidus represents Japan's second national experiment in semiconductors.
As the latter half of fiscal 2027 draws near, the indicators worth watching narrow down. Will the Chitose plant's yield figures be disclosed? Will prototype-stage customers such as Fujitsu and Canon commit to mass-production orders? And how will the remainder of the government's planned 2.9 trillion yen actually be disbursed? The outcome of this bet—attempting the cutting edge with zero mass-production experience—will reveal itself once these three figures come together.