A fund backed by China's largest NAND maker, Yangtze Memory Technologies Co. (YMTC), has invested in Guangzhou-based Rui Li Ping Xin Microelectronics (SOI Micro), which aims to mass-produce FD-SOI semiconductors. The investment target is not memory materials or equipment, but a foundry working on 28nm-class low-power logic. While this is drawing attention as part of China's push to expand semiconductor production that doesn't require EUV lithography systems, bulk CMOS at the 28nm node typically doesn't require EUV either. What this investment actually tests is whether FD-SOI's design assets and specialized substrates can be translated into real mass production.
YMTC-linked capital steps into specialty logic
According to the South China Morning Post (SCMP), Rui Li Ping Xin added Wuhan's Changcun Industry Investment Fund as a new shareholder through a registration change in early August 2026. While registered capital increased from RMB 2.39 billion to RMB 2.53 billion, the fund's specific investment amount and equity stake were not disclosed. The difference of RMB 140 million cannot simply be assumed to equal the Changcun Fund's investment amount.
Changcun Industry Investment Fund was established in 2023 by YMTC and the Hubei Integrated Circuit Industry Investment Fund. SCMP reports that its previous investments had concentrated on the memory supply chain. This marks an expansion of investment targets to specialty logic manufacturing—meaning capital that has supported a NAND maker is now entering a separate manufacturing base as well.
Rui Li Ping Xin was founded in 2022 and is led by Ye Tianchun, former director of the Institute of Microelectronics of the Chinese Academy of Sciences and technical lead for the national "02" Major Project. According to a portfolio introduction by SDIC Chuangye, the company holds approximately 500 patents, has established a process design kit (PDK), and is building production lines together with Wuhan Xinxin (XMC). It had reportedly secured orders from multiple design companies and targeted small-scale mass production in 2025. However, no public announcement confirming that this target was met has been found.
The low-power market that 28nm FD-SOI is targeting
FD-SOI is a planar transistor technology that places an insulating layer beneath a thin silicon layer. Because the insulating layer suppresses leakage current and unwanted capacitance toward the substrate, it makes it easier to reduce power consumption in devices with long standby times. Furthermore, by applying voltage to the substrate—known as "body biasing"—designers can tune the chip to either boost speed during operation or suppress leakage current.
This is already an established mass-production technology overseas. Samsung Foundry began mass production of 28FDS in 2015, and GlobalFoundries (GF) is mass-producing its 22nm 22FDX. CEA-Leti also states that 28nm and 22nm FD-SOI are in mass production at STMicroelectronics, Samsung, and GF. Target markets include automotive microcontrollers and IoT devices, as well as wireless communications and wearables—areas that prioritize the balance of power and cost over maximum speed, including edge AI applications.
28nm-class FD-SOI is not a technology meant to replace cutting-edge GPUs or CPUs. Its strength lies in being able to adjust performance and power consumption according to application needs while maintaining a planar structure. For China, this represents an additional option—distinct from the race to shrink advanced logic nodes—for connecting domestic design companies with production lines.
"No EUV needed" is only a starting point
ASML explains that EUV is used for the most complex layers at the 7nm, 5nm, and 3nm nodes, while the remaining layers are exposed using DUV. Meanwhile, Samsung began mass production of a conventional 28nm planar process back in 2012, which also does not require EUV as a premise. While it's true that the 28nm-class FD-SOI targeted by Rui Li Ping Xin doesn't need EUV, this is not a unique advantage compared to other manufacturing methods at the same node.
FD-SOI's advantage lies in pursuing power efficiency close to FinFET while using a planar structure, allowing for fewer process steps. GF has announced that its 22FDX reduces die size by 20% and cuts mask count by 10% compared to a 28nm planar process. Compared to foundry FinFET, it reportedly uses about 50% fewer layers requiring immersion lithography. This is a comparative figure specific to GF and does not guarantee Rui Li Ping Xin's performance or cost—but it does illustrate FD-SOI's aim of reducing manufacturing complexity.
Even so, the lithography process itself remains necessary. Film deposition and etching are still required, as are metrology and inspection. On the design side, EDA tools and IP are needed. In terms of materials, a stable supply of uniform SOI substrates—different from ordinary bulk silicon—must be secured. National Silicon Industry Group (NSIG) states that it is building a domestic high-end SOI production line in China through its subsidiary Shanghai Simgui Technology (Simgui), but no mass-production supply of 300mm FD-SOI substrates for Rui Li Ping Xin has been announced.
The distance from completing a PDK to achieving mass-production yield
In its 2022 semiconductor industry plan, the city of Guangzhou set out goals including research on 12-inch advanced SOI, an FD-SOI research line, and building an industrial ecosystem including design support. Fourteen listed semiconductor companies have invested in Rui Li Ping Xin, laying groundwork that also involves equipment and materials companies. The participation of the YMTC-linked fund adds a connection point between capital and supply chains that have supported large-scale memory fabs.
However, investing in a fund is not the same as transferring manufacturing technology. YMTC and Rui Li Ping Xin have not announced any joint development or technology licensing. Completing a PDK and securing orders from design companies also do not prove mass-production yield, automotive-grade reliability, or continuous raw material procurement.
In Europe, CEA-Leti is developing 10nm and 7nm FD-SOI on pilot lines, giving the technology a forward-looking roadmap. But for Rui Li Ping Xin, the first thing that needs verification is the 2025 mass-production target that should already have passed. Only once actual wafer shipment volumes, yield rates, and adoption in customer products are disclosed can we judge whether the participation of YMTC-linked capital has actually strengthened China's domestic FD-SOI mass-production base.