On October 13, 2026 (U.S. time), in a keynote at the OCP Global Summit, Intel laid out a vision that positions silicon photonics as a key foundation for next-generation AI systems. Nic Dubé, who leads Intel's Data Center Systems & Solutions group, presented three pillars: integrating indium phosphide (InP) on 300mm silicon wafers, integrating laser light sources, and designing high-bandwidth systems. Intel aims to take the technology it has built through volume production of optical communications components and extend it to a mechanism for flexibly connecting compute resources such as CPUs, GPUs, and memory. Realizing that goal, however, requires more than long-distance optical signal transmission. It also demands system design that accounts for manufacturing, cooling, and replacement when components fail. The direction is documented in Intel's keynote announcement and on page 20 of the keynote materials.
Manufacturing technology for integrating InP on 300mm silicon wafers
"InP on 300mm Silicon," as written in the keynote materials, refers to a technology that combines indium phosphide (InP) with a 300mm-diameter silicon wafer as the base. It does not mean mass-producing 300mm-diameter wafers made entirely of InP crystal. Intel presented the technology as a high-volume manufacturing platform and positioned it as a strength that supports expanded production capacity and stable supply.
Silicon photonics integrates optical pathways such as waveguides, along with modulators that encode information onto light, on a semiconductor chip. Light emitted by a laser is modulated and sent into an optical fiber, and the receiving side converts it back into an electrical signal, enabling high-speed data communication. This differs from optical computing, which replaces the computation itself with light. What Intel is emphasizing this time is efficiently moving large volumes of data between chips and between systems.
A concrete illustration of that manufacturing technology is the eight-wavelength laser array that Intel announced as a research result in June 2022. According to the announcement from that time, the company used its commercial 300mm hybrid silicon photonics manufacturing platform to form diffraction gratings in the waveguides on silicon, which control the wavelength of light, and then bonded a wafer of III-V compound semiconductor responsible for light emission. The approach combines silicon's high-precision processing with the light-emitting properties of compound semiconductors. If multiple wavelengths can be used, signals on different wavelengths can be overlaid on a single optical fiber. For example, if each of eight wavelengths carries independent data, communication capacity can be expanded without increasing the number of fibers. This wavelength-division multiplexing (WDM) is an important technology for supporting denser optical connections.
However, being able to manufacture lasers is a separate challenge from being able to mass-produce them at stable quality. Volume production requires processes that limit variation in optical output and lasing wavelength, as well as a mechanism for efficiently testing large numbers of devices. On Intel's silicon photonics product page, the company explains that integrating the laser light source makes possible wafer-level testing and burn-in testing to detect early failures. Being able to check quality and screen out defective parts before assembling finished products is one more advantage of using the 300mm silicon manufacturing platform.
Eight million units in volume production is not the same as the optical I/O chiplet prototype
According to Intel, since 2016 it has shipped more than 8 million photonic integrated circuits (PICs) containing more than 32 million integrated lasers. These are mainly products for pluggable optical transceivers used by large cloud operators. However, this cumulative shipment figure had already been disclosed at the time of the 2024 announcement and is not a number newly reached with the 2026 keynote.
The distinction to keep in mind is that the volume production record of PICs for existing optical transceivers, the prototype demonstration of the "OCI" optical I/O chiplet announced in 2024, and the next-generation system vision presented in 2026 are each at a different stage of development. On June 26, 2024, Intel publicly demonstrated actual data communication between two CPU platforms using OCI chiplets packaged alongside the CPU. But in the announcement at that time, the company explicitly described the OCI as a prototype. The 2026 keynote materials indicate a direction for deploying this technology across broader AI systems.
| Technology / product disclosed by Intel | Development stage | Results / announced content |
|---|---|---|
| PICs for optical transceivers (cumulative since 2016) | In volume production and shipped | Shipped more than 8 million PICs and more than 32 million integrated lasers; track record of supplying large-scale data centers |
| Optical I/O chiplet "OCI" (announced June 26, 2024) | Prototype stage at time of announcement | Packaged with a CPU; communicated actual data between two CPU platforms |
| Silicon photonics for next-generation systems (2026 OCP keynote) | System vision and foundational technology presented | Described an approach combining 300mm silicon manufacturing, integrated lasers, and high-bandwidth design |
Given these differences, Intel's optical transceiver business has a large-scale volume production record, but that must be distinguished from a volume production record for optical I/O systems combined directly with CPUs and GPUs. Nor can it be concluded that, because OCI was at the prototype stage in 2024, its development status remains unchanged as of 2026. The manufacturing technology and reliability-evaluation experience gained from existing products are strengths, but implementing optical I/O close to compute chips requires fresh verification of connection methods, thermal environments, and more.
4Tbps of communication performance and 5pJ/bit power savings
The OCI chiplet announced in 2024 was designed with 64 communication channels of 32Gbps in each direction, supporting a total bandwidth of up to 4Tbps for send and receive combined. The one-way bandwidth is 64 × 32Gbps = 2,048Gbps, and because this is used bidirectionally, the total comes to about 4Tbps. In other words, the "4Tbps" Intel cited is not a one-way communication speed. This OCI used eight fiber pairs, with eight wavelengths multiplexed on each, and housed the photonic and electronic circuits in the same package as the CPU.
The reason for converting to optical signals near the compute chip is to reduce the loss and power consumption incurred when transmitting electrical signals over long wiring. An approach that places optical components near the compute chip package is called NPO (Near-Packaged Optics), and one that integrates them into the same package as the compute chip or switch ASIC is called CPO (Co-Packaged Optics). In its 2026 keynote, Intel positioned laser integration technology as a key component of NPO. By bringing high-speed optical communication close to the chip, it aims to extend transmission distance while increasing connection density.
On power efficiency, Intel stated in the 2024 OCI announcement that the energy needed to transfer one bit of data is 5 picojoules (5pJ/bit). The pluggable optical transceiver module it cited as a comparison is about 15pJ/bit, which by Intel's published figures works out to roughly one-third the energy consumption. However, the specific product used for comparison and the details of which circuits or equipment were included in the power measurement were not shown. For that reason, the result cannot be regarded as confirmed by an independent, same-conditions comparison test, nor does it mean that the power consumption of an entire AI rack would fall to one-third.
The effect that improved optical communication efficiency has on the whole system depends on the share of total power consumption that communication accounts for. AI servers also require large amounts of power for computation, memory, and cooling, so power savings in optical I/O alone do not determine overall system efficiency. Judging the real-world benefit requires measuring the amount of data transferred and the processing performance when running AI workloads, along with the power consumption of the entire system.
Transmission distance also deserves attention. The 2024 OCI was designed to support optical fiber connections of up to 100m, but Intel explained that, because of optical propagation delay, practical use cases could be limited to a few tens of meters. Even if a signal can be carried far over fiber, that does not guarantee meeting the response times needed for memory access or synchronization among multiple chips. Making use of optical communication's long-distance capability for flexible placement of compute resources requires system design that includes communication latency.
Build the laser in, or keep it external?
When incorporating optical I/O into actual products, where to place the laser light source is also an important design question. In a CPO framework document published in 2022 by OIF, the optical interconnect standards body, the differences between building the laser into the optical engine and using an external light source are laid out. The integrated approach makes it easier to limit optical loss from the source to the modulator and may allow operation at relatively low optical output. The external approach, on the other hand, allows the laser to be placed away from the highly heat-generating switch ASIC, which offers advantages in thermal management and replacement upon failure.
External light sources also lend themselves to designs in which a failed laser module can be replaced from the front of the equipment. The trade-off is a longer path for carrying light from the source to the optical engine, which increases insertion loss and may call for higher optical output to compensate. Conversely, integrating the laser into the optical engine can limit optical loss, but the thermal environment around the compute chip and the methods for repair and replacement upon failure must be considered carefully. Being able to integrate the light source does not automatically lead to better reliability or serviceability.
At this OCP Global Summit, a specific system using external lasers was also announced. On October 12, Lightmatter unveiled a 204.8Tbps CPO switch tray co-developed with Flex and a 102.4Tbps XPU tray built on another ODM company's platform. According to Lightmatter's announcement, the former is a system intended to validate volume production processes, while the latter is a prototype system for technology demonstration. Both use the company's Guide DR external laser module and take into account the mating and unmating of optical connectors and integration into the rack.
However, directly comparing the tray-level bandwidth published by Lightmatter with the bandwidth of Intel's OCI chiplet alone does not reveal which performs better, because the configurations and scales being compared differ. What matters is that work is advancing not only on light sources and photonic integrated circuits, but on turning them into systems that can be placed in racks and operated, including cooling and replacement. Whether Intel's strength in integrated laser technology can meet these real-world operating conditions will shape its future competitiveness.
Next-generation AI systems that flexibly connect CPUs, GPUs, and memory
In the 2024 OCI announcement, Intel listed scaling up systems that connect many CPUs and GPUs, as well as memory expansion and resource disaggregation of compute, as future applications. If optical communication can extend high-speed connections over longer distances, there is less need to arrange CPUs, accelerators, and memory in fixed configurations. For example, more flexible system designs become possible in which the needed compute and memory resources are combined according to the use case. Such disaggregation and sharing of resources is expected to be a means of raising utilization in large-scale AI systems.
That said, simply connecting devices with optical fiber does not let compute resources be shared freely. A mechanism is needed to keep memory contents consistent across multiple devices, along with software that manages the allocation of work to each device. Longer distances between devices also increase communication latency, so the appropriate placement must be chosen according to the required response time. Optical I/O widens the freedom of hardware configuration, but running disaggregated compute resources efficiently as a single system requires design that includes communication protocols and software.
What Intel showed at this OCP Global Summit is a direction of using a 300mm silicon manufacturing platform, integrated laser reliability, and high-bandwidth design technology to support such next-generation AI systems. It is trying to extend the volume production technology cultivated in its existing optical transceiver business into optical I/O that is tightly integrated with compute chips. However, the keynote materials do not indicate release timing or pricing for individual products, and it is also unclear how far this vision has been deployed in actual customer systems.
The focus going forward is how much optical-I/O-equipped CPUs and GPUs can improve communication efficiency and power efficiency in real AI workloads. Beyond the performance of the optical link alone, the operability of the whole system, including cooling, failure response, and replacement work, will also need to be evaluated. If Intel can develop products that meet these conditions, the volume production technology for silicon photonics it has built over many years could become an important strength in making AI system configurations more flexible.