Micron is developing a new memory product called EIM (Edge Inference Memory) for physical AI such as robots. According to Korean outlet The Elec, the concept stacks LPDDR, a low-power DRAM, on top of a logic die so that the data needed for AI inference can be transferred faster. Some expect mass production to begin in the second half of 2028, but that is a forecast from industry sources, not a schedule Micron has officially announced. To run advanced AI on battery-powered robots, memory must not only offer enough capacity to store large amounts of data but also feed data to the processing units quickly while keeping power consumption low.
EIM stacks LPDDR for AI inference, but its compute architecture remains undisclosed
According to The Elec's October 16 article, Micron's Lee Cheol spoke that day at a conference held alongside the semiconductor exhibition SEDEX 2026 at COEX in Seoul, South Korea. He explained that, with the physical AI market growing, including autonomous vehicles and humanoid robots, Micron is discussing the development of new memory products with major customers.
One of them is EIM, which is being developed for AI inference. EIM is said to adopt a structure in which LPDDR is stacked on top of a logic die containing control and logic circuits. The aim is to reduce data-transfer latency between the AI chip and the memory while increasing the amount of data that can be transferred per unit of time (memory bandwidth). The Elec also reports that Micron is developing technology to apply EIM to LPDDR6.
However, EIM's specific compute architecture and performance targets have not been disclosed. It is treated as a different technology from PIM (Processing-in-Memory), which builds compute functions into the memory itself, and the fact that LPDDR is stacked does not by itself mean AI computation is executed inside the memory. It also remains unclear whether EIM can achieve transfer performance comparable to HBM (high-bandwidth memory) at LPDDR-level power consumption. No comparable figures for bandwidth or power consumption have been given, and the late-2028 mass-production timing is only a forecast from industry sources relayed by The Elec.
For AI inference, data-transfer speed matters as much as memory capacity
To understand the technical direction EIM is aiming for, it helps to review the role of memory in AI inference. A technical white paper published by Micron explains that even with relatively small language models, running inference involves transferring far more data than the size of the model itself. The white paper deals with AI inference on smartphones and PCs, not robot-oriented EIM specifications, but it is a useful reference for understanding the difference between memory capacity and transfer speed.
First, storage and DRAM play different roles. AI models are usually kept in storage such as UFS and are loaded into DRAM such as LPDDR, which the processor can access quickly, when inference runs. Even if storage has enough capacity to hold an entire model, that alone does not guarantee the data-transfer speed inference needs. And even after the model is loaded into DRAM, large amounts of data move back and forth between memory and the processor during inference.
Language-model inference is broadly divided into two stages: "prefill" and "decode." In prefill, the input text and other data are processed together; in decode, the output is then generated sequentially in units called tokens. Each time a token is generated, the decode stage refers to the model's weight data and also accesses the KV cache, which stores information about past context. The KV cache holds the keys and values computed from past tokens so that the same calculations need not be repeated. Because this process repeats, high memory bandwidth is needed in addition to the capacity to store the model.
As a concrete example, Micron's January 2026 white paper (page 4) considers a case in which a 2.3GB model generates 20 tokens per second, reading the entire model once for each token. Under these conditions, merely reading the model's weight data requires a transfer rate of 46GB per second. The calculation is as follows.
\[ 2.3\ \mathrm{GB}\times20\ \mathrm{times/s}=46\ \mathrm{GB/s} \]
This is only a calculation example under assumed conditions; it does not indicate EIM's measured performance or the bandwidth a humanoid robot requires. In practice, KV cache accesses add further transfer volume, while reuse of model weights, caching, and differences in decoding methods change the amount of transfer needed. Even so, it is important that storing a 2.3GB model in memory and transferring that model's data at 46GB per second are entirely different requirements.
Increasing memory capacity lets larger AI models and in-process data stay in DRAM. But to finish inference within a set time, the data the processor needs must be delivered fast enough, which requires improvements in bandwidth and access latency as well as capacity. For EIM, too, it will be necessary to confirm how much capacity the stacked structure can add and how far it can raise data-transfer performance.
More advanced humanoids will need high-capacity, low-power memory
According to Lee Cheol's explanation as reported by The Elec, current robot AI models have roughly 1 to 2 billion parameters, and demands on memory bandwidth are not yet that high. However, as vision-language models (VLMs), which process images and language together, become more advanced, conventional LPDDR alone may struggle to keep up. He said he expects HBM to be adopted in humanoid robots in the future. This is a forecast premised on larger AI models, though, and does not mean every robot will carry HBM.
Memory capacity itself is also expected to increase significantly. The Elec reports the following about the memory configurations Micron presented for current service robots and future high-performance humanoids.
| Comparison | DRAM capacity | Storage capacity | Status of the figure |
|---|---|---|---|
| Current service robot | 12GB | 256GB | Example of current configuration |
| Future high-performance humanoid | About 200GB | 4TB | Micron's future forecast |
These figures are not a comparison between generations of the same robot, nor do they represent a market-wide average. Because the types of robots and the assumed timeframes differ, the difference in capacity cannot be read directly as a performance multiple. Still, they convey Micron's outlook that future high-performance humanoids will need larger capacity in both DRAM, which holds the AI model and in-process data, and storage, which holds models and other data.
For battery-powered robots, memory power consumption is also an important constraint. Micron's explanation of edge AI describes the benefits of running AI processing on the device while reducing communication with the cloud, along with the importance of LPDDR5X memory bandwidth and power efficiency. Even if a robot can make decisions without waiting for cloud communication, large amounts of data must still be transferred internally between the processor and memory. Reducing communication delays and speeding up and cutting the power use of a robot's internal data transfer are separate challenges.
Against this background, EIM is not simply a technology for increasing robots' memory capacity. Two different technical options appear to be under consideration: EIM, which stacks LPDDR to improve bandwidth and access latency, and HBM, to handle still larger AI models. How much bandwidth and power efficiency EIM can achieve, and how it would be used alongside HBM, will have to wait for the release of its specifications.
Lee Cheol said Micron is working from the early design stages of products not only with robot makers and chipset makers but also with large cloud providers. This suggests that how to combine AI processors and memory is an important consideration ahead of productization. To evaluate EIM's practicality, it will matter not just how high its peak bandwidth is but how its power consumption and latency compare with configurations using existing LPDDR or HBM when running the same AI model at the same processing speed. If an advantage is confirmed under such conditions, it should become easier to equip robots with limited battery capacity with AI capable of more advanced perception and decision-making.