
NVIDIA、Veraの1.5TB上限を維持:メモリ半減観測と両立する「最大」の意味
NVIDIAはVeraの最大1.5TB仕様を維持したが、供給制約による搭載量半減観測とは矛盾しない。量産SKUの容量・帯域と価格開示が、柔軟な構成か供給不足への妥協かを見分ける基準となる。
別名: Vera, Vera CPU
Vera Rubinプラットフォームの一部として開発されたNVIDIAの次世代CPU。Grace CPUの後継にあたり、Armv9.2互換のカスタムコア「Olympus」を88コア搭載する。NVIDIA Spatial Multi-Threadingにより176スレッドをサポートし、メモリ容量はGraceの3倍となる1.5TBに拡張。GPUとメモリ空間を共有し、複雑なエージェントAIのロジック処理に最適化されている。

NVIDIAはVeraの最大1.5TB仕様を維持したが、供給制約による搭載量半減観測とは矛盾しない。量産SKUの容量・帯域と価格開示が、柔軟な構成か供給不足への妥協かを見分ける基準となる。

NVIDIAはSSIに出資し、Vera Rubinへのアクセスで計算資源を約10倍に増やす。50億ドルとの報道がある一方、利用規模や稼働時期は未開示で、両社は次世代基盤の共同開発も進める。

NVIDIAがVera CPUの詳細白書とSPECrate 2026整数試算を公開。少ないコアでEPYC 9755を約3%上回る一方、正式登録と独立検証が残る。

RubinはMoEの重み搬送や長文脈Attention、カーネル依存、NVLink同期の待ち時間を減らす。NVIDIAは推論設備の演算器を止めず、電力当たりの処理量を伸ばす設計を具体化した。

NVIDIAの次世代AIアクセラレーター「Rubin Ultra」において、製造上の懸念から4チップレット構成を断念し、2チップレットへ変更する計画が報じられた。同社は単体性能の追求よりも量産性を重視し、ラック単位での最適化へ舵を切った。

NVIDIAは2026年登場のARMベースSoC「RTX Spark」を皮切りに、2030年までの長期ロードマップを公開した。独自のCPUとGPUを統合した三世代にわたる継続的な製品投入を明示することで、先行する競合に対抗しエコシステムの不安払拭を狙う。

NVIDIAの最新決算は、データセンター売上が全体の9割を占め、AIインフラ企業としての地位を確立したことを示している。同社は売上区分を再編し、GPU単体ではなくAI工場のプラットフォーム企業として自らを位置づけ、Vera CPUをAIエージェント実行基盤の中核に据えることで、2000億ドル規模の新たな市場開拓を目指している。

NVIDIAとMarvell Technologyは2026年3月31日、NVLink Fusion™を通じた戦略的パートナーシップと、NVIDIAによる20億ドルの投資を発表した。発表を受けてMarvel […]

2026年1月6日、ラスベガスで開催されたCES 2026の基調講演において、NVIDIAのCEO、Jensen Huang氏が放った一言が、世界の空調機器(HVAC)市場に激震を走らせた。 「我々は基本的に、このスーパ […]

2026年のCES(Consumer Electronics Show)において、AIコンピューティングの覇者NVIDIAは、次世代アーキテクチャ「Vera Rubin」プラットフォームを正式に発表した。 業界の予想を大 […]
Abstract Introduction Although simultaneous polysubstance use (SPU) is associated with greater harms than concurrent polysubstance use (CPU), no previous research has examined the effectiveness of harm reduction strategies in reducing drug-related harms in people who use drugs simultaneously and whether these strategies have a differential impact on drug-related negative consequences according to SPU patterns. Objectives: to examine the relationship between SPU patterns, harm reduction strategies and drug-related consequences experienced among people who attend dance music settings, and to examine the moderating role of SPU patterns in the relationship between harm reduction strategies and drug-related negative consequences Methods: a web-based survey was used to gather data from 649 substance-using attendees at dance music settings (mean age = 26.2, 68% male). The survey collected data on: settings of last party attended, drug use, harm reduction strategies used and drug-related negative consequences experienced during last party attended. Results: Latent class analysis identified two SPU profiles: Moderate SPU and Severe SPU. Participants in the severe SPU class experienced more drug-related negative consequences at their last party in comparison with those in the moderate SPU class. Regardless of SPU pattern, avoiding binge drinking was related to fewer drug-related negative consequences, whilst avoiding mixing stimulants was related to fewer drug-related negative consequences only among those participants in the severe simultaneous polysubstance use class. Conclusions: These findings could help to inform the design of messages and tailored interventions aimed at minimizing drug-related negative consequences among people who use multiple substances in the dance music scene.
Register allocation is one of the most important problems for modern compilers. With a practically unlimited number of user variables and a small number of CPU registers, assigning variables to registers without conflicts is a complex task. This work demonstrates the use of casting the register allocation problem as a graph coloring problem. Using technologies such as PyTorch and OpenAI Gymnasium Environments we will show that a Proximal Policy Optimization model can learn to solve the graph coloring problem. We will also show that the labeling of a graph is critical to the performance of the model by taking the matrix representation of a graph and permuting it. We then test the model's effectiveness on each of these permutations and show that it is not effective when given a relabeling of the same graph. Our main contribution lies in showing the need for label reordering invariant representations of graphs for machine learning models to achieve consistent performance.
Matrix multiplication is an essential operation in the field of mathematics and computer science. Many critical computations, such as matrix factorization and graph computations, cast the bulk of their computation in terms of this operation. Thus, it is crucial that this operation is tuned to the data being computed on. In the case of sparse domains, this translates to minimizing the traffic between the CPU and main memory as the amount of work is not necessarily sufficient to amortize the code of the data movement. The amount of memory required to store a nonnegative valued matrix of n rows and m columns requires (n × m) × log2(n) bits. When these dimensions are converted to real world scenarios, for example, a one billion by one billion matrix will require 1000 petabytes of memory, which is impractical. This hinders the ability to perform any operations on the matrix.In this paper, we propose techniques for performing Matrix-Matrix multiplication directly on compressed data stored in two different compression data structures. The structures we consider are the well-known compressed sparse matrix and the Compressed Binary Trees [1]. We test our algorithm on extremely large matrices, in the order of 100s of millions with various levels of sparsity. We show for matrices of order 100 million with 10 million nonzero elements, the space required to store the matrices using the CBT representation is about 6.4MB and requires 13.52s to complete the multiplication using the sequential algorithms provided in this paper.